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| author | Jason Wang <Qingpei.Wang@amd.com> | 2008-11-28 05:40:27 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-28 05:40:27 +0000 |
| commit | d95e43cc8f66203a8287f8a7c54ecc3ab74436e6 (patch) | |
| tree | 03bb79378560bf63f1fb91a9572e1f7e7024804b /util/dump_mmcr | |
| parent | 6f24cbc0833fd923238f516dd8964660807ef789 (diff) | |
| download | coreboot-d95e43cc8f66203a8287f8a7c54ecc3ab74436e6.tar.xz | |
Add SST25VF080B flash chip support.
This is the first chip which uses the infrastructure for alternative
erase commands, namely spi_chip_erase_60_c7().
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/dump_mmcr')
0 files changed, 0 insertions, 0 deletions