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authorSteven J. Magnani <steve@digidescorp.com>2005-09-26 13:54:32 +0000
committerSteven J. Magnani <steve@digidescorp.com>2005-09-26 13:54:32 +0000
commita4baa1673e211d1a78489be32cd988bef44fe6bb (patch)
tree5f205d9aadbdffae7ab5c0a0f0ddd48ae19b425d /util/flash_and_burn
parent87888630b27ae64218abc1abcf06a213eb342d97 (diff)
downloadcoreboot-a4baa1673e211d1a78489be32cd988bef44fe6bb.tar.xz
* Added support for "fast" (64-clock) refresh
* Added code to support remap window for 3 - 4 GB systems * Fixed premature configuration of true row boundaries that resulted in some sections of DRAM not receiving JEDEC commands (see http://openbios.org/pipermail/linuxbios/2005-June/011752.html). * Redefined RCOMP_MMIO so that RCOMP registers can be configured on systems where A20M# is asserted. * Disabled subsystem (vendor) ID configuration * #ifdef'd out suspicious looking code (see http://openbios.org/pipermail/linuxbios/2005-June/011759.html) * Added optional run-time checking of dual-channel compatibility of installed DIMMs * Move JEDEC SPD and SDRAM definitions into reusable #include files git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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