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authorJason Wang <Qingpei.Wang@amd.com>2008-11-28 21:36:51 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2008-11-28 21:36:51 +0000
commitf22ce41840ae966a6f465e90c8f05aed9ae5ef6b (patch)
tree8cdef566a6d0c3449ab8f12adad0f05e5c6bd4ab /util/flashrom/Makefile
parent4ed326be5d7dec9ee16190847ea0b9f42117fe1a (diff)
downloadcoreboot-f22ce41840ae966a6f465e90c8f05aed9ae5ef6b.tar.xz
Add support for the AMD/ATI SB600 southbridge SPI functionality.
This has been tested by Uwe Hermann on an RS690/SB600 board. Signed-off-by: Jason Wang <Qingpei.Wang@amd.com> Reviewed-by: Joe Bao <zheng.bao@amd.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/Makefile')
-rw-r--r--util/flashrom/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/Makefile b/util/flashrom/Makefile
index 09c68dedf1..c79d402b6a 100644
--- a/util/flashrom/Makefile
+++ b/util/flashrom/Makefile
@@ -29,7 +29,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
- ichspi.o w39v040c.o
+ ichspi.o w39v040c.o sb600spi.o
all: pciutils dep $(PROGRAM)