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authorDominik Geyer <dominik.geyer@kontron.com>2008-05-16 12:55:55 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-16 12:55:55 +0000
commitfac0afb87d216e51284b934042cfeb6f27e70864 (patch)
tree1f96fc2a55d9d43fb000f26ab3584102a04aa727 /util/flashrom/Makefile
parente7b11577641b3f78eda07000583ebdd5e62fed4c (diff)
downloadcoreboot-fac0afb87d216e51284b934042cfeb6f27e70864.tar.xz
Add support for SPI chips on ICH9. This is done by using the generic SPI
interface. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/Makefile')
-rw-r--r--util/flashrom/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/util/flashrom/Makefile b/util/flashrom/Makefile
index 2f0b290eae..35b891db1a 100644
--- a/util/flashrom/Makefile
+++ b/util/flashrom/Makefile
@@ -24,7 +24,8 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \
sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
- flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o
+ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
+ ichspi.o
all: pciutils dep $(PROGRAM)