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authorMarc Jones <marc.jones@amd.com>2008-01-26 07:35:47 +0000
committerRonald G. Minnich <rminnich@gmail.com>2008-01-26 07:35:47 +0000
commit2db94642992c2db99da7283965f260e16f669738 (patch)
tree47120544aad51d1ebd5518bfa7c0b8d9a29f8485 /util/flashrom/chipset_enable.c
parent873312d69964b76f398023513f09587e74fdec10 (diff)
downloadcoreboot-2db94642992c2db99da7283965f260e16f669738.tar.xz
Correctly disable the ROM area Write Protect bit in the Geode LX.
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Tested on the pcengines alix1c and works fine. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/chipset_enable.c')
-rw-r--r--util/flashrom/chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c
index 7eecf09824..4cbb941789 100644
--- a/util/flashrom/chipset_enable.c
+++ b/util/flashrom/chipset_enable.c
@@ -256,7 +256,7 @@ static int enable_flash_cs5536(struct pci_dev *dev, const char *name)
close(fd_msr);
if (buf[7] != 0x22) {
printf("Enabling Geode MSR to write to flash.\n");
- buf[7] = 0x22;
+ buf[7] &= 0xFB;
fd_msr = open("/dev/cpu/0/msr", O_WRONLY);
if (!fd_msr) {
perror("open msr");