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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
| commit | 3b408fd23794c6d012be79173021e532d1b47ba6 (patch) | |
| tree | b6165d021f301eb5736664bc5e1385eb3f084c81 /util/flashrom/flash.h | |
| parent | c9a677b4b31b5c56d953c549e626d3989d7c3623 (diff) | |
| download | coreboot-3b408fd23794c6d012be79173021e532d1b47ba6.tar.xz | |
Add support for ST M25P80 chips to flashrom. Detection was tested.
Print status register before erase to help debugging block locks.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/flash.h')
| -rw-r--r-- | util/flashrom/flash.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index 2bcdf91041..09e239ea0d 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -167,7 +167,12 @@ extern struct flashchip flashchips[]; #define SST_49LF016C 0x5C #define SST_49LF160C 0x4C +/* + * ST25P chips are SPI, first byte of device ID is memory type, second + * byte of device ID is related to log(bitsize) at least for some chips. + */ #define ST_ID 0x20 /* ST */ +#define ST_M25P80 0x2014 #define ST_M50FLW040A 0x08 #define ST_M50FLW040B 0x28 #define ST_M50FLW080A 0x80 |