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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-28 23:45:27 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-28 23:45:27 +0000 |
| commit | f86f1fe961f661a0c892bdd6de94007cc1466c01 (patch) | |
| tree | f77250f688951ed90576078f9fd67f86f1dba07c /util/flashrom/flash.h | |
| parent | f22ce41840ae966a6f465e90c8f05aed9ae5ef6b (diff) | |
| download | coreboot-f86f1fe961f661a0c892bdd6de94007cc1466c01.tar.xz | |
If a chip has any TEST_BAD_* flag set, we don't even list the
unsupported functions, giving the user the impression that the
unsupported functions are tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/flash.h')
| -rw-r--r-- | util/flashrom/flash.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index cbc2e48a87..70a390f2f3 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -95,6 +95,7 @@ struct flashchip { #define TEST_BAD_READ (1<<5) #define TEST_BAD_ERASE (1<<6) #define TEST_BAD_WRITE (1<<7) +#define TEST_BAD_PREW (TEST_BAD_PROBE|TEST_BAD_READ|TEST_BAD_ERASE|TEST_BAD_WRITE) #define TEST_BAD_MASK 0xf0 extern struct flashchip flashchips[]; @@ -106,7 +107,7 @@ extern struct flashchip flashchips[]; * * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no * continuation code. - * All SPI parts have 16-bit device IDs. + * SPI parts have 16-bit device IDs if they support RDID. */ #define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */ |