diff options
| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-18 00:41:02 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-18 00:41:02 +0000 |
| commit | 7cb70d9abd5423182b95c815d50ad1979519a5f4 (patch) | |
| tree | 4e4251947e24bc37e255dae5494169dcab31e7fd /util/flashrom/flash.h | |
| parent | 9648351d75af014e257d743a1ea0360b7119c3e7 (diff) | |
| download | coreboot-7cb70d9abd5423182b95c815d50ad1979519a5f4.tar.xz | |
Check for failed SPI command execution in flashrom. Although SPI itself
does not have a mechanism to signal command failure, the SPI host may be
unable to send a given command over the wire due to security or hardware
limitations. The current code ignores these mechanisms completely and
simply assumes almost every command succeeds. Complain if SPI command
execution fails.
Since locked down Intel chipsets (like the one we had problems with
earlier) only allow a small subset of commands, find the common subset
of commands between the chipset and the ROM in the chip erase case. That
is accomplished by the new spi_chip_erase_60_c7() which can be used for
chips supporting both 0x60 and 0xc7 chip erase commands.
Both parts of the patch address problems seen in the real world. The
increased verbosity for the error case will help us diagnose and address
problems better.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Otherwise: Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/flash.h')
| -rw-r--r-- | util/flashrom/flash.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index 6690516535..9f6a862795 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -452,19 +452,20 @@ int probe_spi_rdid4(struct flashchip *flash); int probe_spi_res(struct flashchip *flash); int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); -void spi_write_enable(); -void spi_write_disable(); +int spi_write_enable(); +int spi_write_disable(); int spi_chip_erase_60(struct flashchip *flash); int spi_chip_erase_c7(struct flashchip *flash); +int spi_chip_erase_60_c7(struct flashchip *flash); int spi_chip_erase_d8(struct flashchip *flash); int spi_block_erase_52(const struct flashchip *flash, unsigned long addr); int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr); int spi_chip_write(struct flashchip *flash, uint8_t *buf); int spi_chip_read(struct flashchip *flash, uint8_t *buf); uint8_t spi_read_status_register(); -void spi_disable_blockprotect(void); +int spi_disable_blockprotect(void); void spi_byte_program(int address, uint8_t byte); -void spi_nbyte_read(int address, uint8_t *bytes, int len); +int spi_nbyte_read(int address, uint8_t *bytes, int len); /* 82802ab.c */ int probe_82802ab(struct flashchip *flash); |