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| author | Peter Stuge <peter@stuge.se> | 2008-06-29 01:30:41 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-06-29 01:30:41 +0000 |
| commit | 891f1a2650c5b32c65103fa9a5659953fab34157 (patch) | |
| tree | 3eb6ab606677d60773e06e5826596bb78b30396d /util/flashrom/ichspi.c | |
| parent | 50e4a095ddff2efd3b780d585960fa928a6d93bb (diff) | |
| download | coreboot-891f1a2650c5b32c65103fa9a5659953fab34157.tar.xz | |
flashrom: Fix ICH7 non-SPI that broke in r3393
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.
Also fixes a build error in ichspi.c with gcc 4.2.2.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/ichspi.c')
| -rw-r--r-- | util/flashrom/ichspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/ichspi.c b/util/flashrom/ichspi.c index d6c0157e13..b6b0f36fd6 100644 --- a/util/flashrom/ichspi.c +++ b/util/flashrom/ichspi.c @@ -229,7 +229,7 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset, { int write_cmd = 0; int timeout; - uint32_t temp32; + uint32_t temp32 = 0; uint16_t temp16; uint32_t a; |