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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2007-04-01 17:24:03 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2007-04-01 17:24:03 +0000 |
| commit | 1a9c892d58c746aef0cb530481c214e63a6a6871 (patch) | |
| tree | 9d7b2d90dd70ddb9bb314c8c11a18e91444a889f /util/flashrom/rom.layout | |
| parent | 0d9d0bae8ac4ca1dce6bcdd549290b5b47fa37b1 (diff) | |
| download | coreboot-1a9c892d58c746aef0cb530481c214e63a6a6871.tar.xz | |
Initial Intel 440BX RAM initialization framework.
This does _not_ fully work, yet. You will _not_ be able to boot any
payload with this code, yet.
Add missing license headers.
Base the northbridge.c file on the Intel 855PM version, that comes
closer to what we want.
The raminit.c file is written from scratch and hardcodes several
values for now. This needs to be fixed later by reading the
correct values via SPD.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/rom.layout')
0 files changed, 0 insertions, 0 deletions