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authorRonald G. Minnich <rminnich@gmail.com>2006-03-14 19:58:14 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-03-14 19:58:14 +0000
commitc994c973c654817f5e764615776b78b84cd21910 (patch)
tree37e35c7cd905ef9b5cacc8dbd76628c134e5f68c /util/flashrom/sharplhf00l04.h
parentd96e098def3ed64be0b775d4a6c058821e33b5ef (diff)
downloadcoreboot-c994c973c654817f5e764615776b78b84cd21910.tar.xz
Fix for nehemiah
other fixes for gx2 ram init. support for sharplfg00l04 -- not working yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/sharplhf00l04.h')
-rw-r--r--util/flashrom/sharplhf00l04.h39
1 files changed, 39 insertions, 0 deletions
diff --git a/util/flashrom/sharplhf00l04.h b/util/flashrom/sharplhf00l04.h
index d615dfa44b..3b8852a828 100644
--- a/util/flashrom/sharplhf00l04.h
+++ b/util/flashrom/sharplhf00l04.h
@@ -4,5 +4,44 @@
extern int probe_lhf00l04(struct flashchip *flash);
extern int erase_lhf00l04(struct flashchip *flash);
extern int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
+extern __inline__ void toggle_ready_lhf00l04(volatile uint8_t *dst)
+{
+ unsigned int i = 0;
+ uint8_t tmp1, tmp2;
+
+ tmp1 = *dst & 0x40;
+
+ while (i++ < 0xFFFFFF) {
+ tmp2 = *dst & 0x40;
+ if (tmp1 == tmp2) {
+ break;
+ }
+ tmp1 = tmp2;
+ }
+}
+
+extern __inline__ void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data)
+{
+ unsigned int i = 0;
+ uint8_t tmp;
+
+ data &= 0x80;
+
+ while (i++ < 0xFFFFFF) {
+ tmp = *dst & 0x80;
+ if (tmp == data) {
+ break;
+ }
+ }
+}
+
+extern __inline__ void protect_lhf00l04(volatile uint8_t *bios)
+{
+ *(volatile uint8_t *) (bios + 0x5555) = 0xAA;
+ *(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
+ *(volatile uint8_t *) (bios + 0x5555) = 0xA0;
+
+ usleep(200);
+}
#endif /* !__SHARPLHF00L04_H__ */