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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
| commit | 3b408fd23794c6d012be79173021e532d1b47ba6 (patch) | |
| tree | b6165d021f301eb5736664bc5e1385eb3f084c81 /util/flashrom/spi.c | |
| parent | c9a677b4b31b5c56d953c549e626d3989d7c3623 (diff) | |
| download | coreboot-3b408fd23794c6d012be79173021e532d1b47ba6.tar.xz | |
Add support for ST M25P80 chips to flashrom. Detection was tested.
Print status register before erase to help debugging block locks.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/spi.c')
| -rw-r--r-- | util/flashrom/spi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c index 8467664137..8ae6357832 100644 --- a/util/flashrom/spi.c +++ b/util/flashrom/spi.c @@ -280,7 +280,11 @@ uint8_t generic_spi_read_status_register() int generic_spi_chip_erase(struct flashchip *flash) { const unsigned char cmd[] = JEDEC_CE_2; + uint8_t statusreg; + statusreg = generic_spi_read_status_register(); + printf("chip status register before erase is %02x\n", statusreg); + generic_spi_write_enable(); /* Send CE (Chip Erase) */ generic_spi_command(JEDEC_CE_2_OUTSIZE, JEDEC_CE_2_INSIZE, cmd, NULL); |