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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-10 23:40:51 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-10 23:40:51 +0000
commitcd0b5631ded5e1679980d2db78c0d996326f0f3a (patch)
tree4f14a7dfb904291485bf48970b173eb9ac3d6db7 /util/flashrom/spi.c
parent31ab0314d1ccd36f9240c4c0aafd0a3700605cb9 (diff)
downloadcoreboot-cd0b5631ded5e1679980d2db78c0d996326f0f3a.tar.xz
Improve flashrom SPI abstraction, second step.
This paves the way to have a fully generic generic_spi_command without knowledge about any SPI controller. The third step would be calling SPI controller functions via a function pointer. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/spi.c')
-rw-r--r--util/flashrom/spi.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c
index 177e49cc71..d564195c7e 100644
--- a/util/flashrom/spi.c
+++ b/util/flashrom/spi.c
@@ -179,13 +179,13 @@ int it87xx_probe_spi_flash(const char *name)
whereas the IT8716F splits commands internally into address and non-address
commands with the address in inverse wire order. That's why the register
ordering in case 4 and 5 may seem strange. */
-static int it8716f_spi_command(uint16_t port, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
+static int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
{
uint8_t busy, writeenc;
int i;
do {
- busy = inb(port) & 0x80;
+ busy = inb(it8716f_flashport) & 0x80;
} while (busy);
if (readcnt > 3) {
printf("%s called with unsupported readcnt %i.\n",
@@ -194,27 +194,27 @@ static int it8716f_spi_command(uint16_t port, unsigned int writecnt, unsigned in
}
switch (writecnt) {
case 1:
- outb(writearr[0], port + 1);
+ outb(writearr[0], it8716f_flashport + 1);
writeenc = 0x0;
break;
case 2:
- outb(writearr[0], port + 1);
- outb(writearr[1], port + 7);
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 7);
writeenc = 0x1;
break;
case 4:
- outb(writearr[0], port + 1);
- outb(writearr[1], port + 4);
- outb(writearr[2], port + 3);
- outb(writearr[3], port + 2);
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 4);
+ outb(writearr[2], it8716f_flashport + 3);
+ outb(writearr[3], it8716f_flashport + 2);
writeenc = 0x2;
break;
case 5:
- outb(writearr[0], port + 1);
- outb(writearr[1], port + 4);
- outb(writearr[2], port + 3);
- outb(writearr[3], port + 2);
- outb(writearr[4], port + 7);
+ outb(writearr[0], it8716f_flashport + 1);
+ outb(writearr[1], it8716f_flashport + 4);
+ outb(writearr[2], it8716f_flashport + 3);
+ outb(writearr[3], it8716f_flashport + 2);
+ outb(writearr[4], it8716f_flashport + 7);
writeenc = 0x3;
break;
default:
@@ -226,15 +226,15 @@ static int it8716f_spi_command(uint16_t port, unsigned int writecnt, unsigned in
* Note:
* We can't use writecnt directly, but have to use a strange encoding.
*/
- outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), port);
+ outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
if (readcnt > 0) {
do {
- busy = inb(port) & 0x80;
+ busy = inb(it8716f_flashport) & 0x80;
} while (busy);
for (i = 0; i < readcnt; i++) {
- readarr[i] = inb(port + 5 + i);
+ readarr[i] = inb(it8716f_flashport + 5 + i);
}
}
@@ -244,7 +244,7 @@ static int it8716f_spi_command(uint16_t port, unsigned int writecnt, unsigned in
int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
{
if (it8716f_flashport)
- return it8716f_spi_command(it8716f_flashport, writecnt, readcnt, writearr, readarr);
+ return it8716f_spi_command(writecnt, readcnt, writearr, readarr);
printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__);
return 1;
}