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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-15 03:19:49 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-05-15 03:19:49 +0000
commita4868c44b56424d3f0c28ad1a6aa95bdd7eae04b (patch)
tree2c2ae700648ed4075c83e65f89fa6d62ee161f8b /util/flashrom/spi.c
parentc7d29013db37b25e842d5208d0c5664282715055 (diff)
downloadcoreboot-a4868c44b56424d3f0c28ad1a6aa95bdd7eae04b.tar.xz
Add support for the JEDEC RES (Read Electronic Signature and Resume from
Powerdown) SPI command to flashrom to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom/spi.c')
-rw-r--r--util/flashrom/spi.c41
1 files changed, 40 insertions, 1 deletions
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c
index 786d555ee9..ddb9ff8fdc 100644
--- a/util/flashrom/spi.c
+++ b/util/flashrom/spi.c
@@ -49,6 +49,16 @@ static int spi_rdid(unsigned char *readarr)
return 0;
}
+static int spi_res(unsigned char *readarr)
+{
+ const unsigned char cmd[JEDEC_RES_OUTSIZE] = {JEDEC_RES, 0, 0, 0};
+
+ if (spi_command(JEDEC_RES_OUTSIZE, JEDEC_RES_INSIZE, cmd, readarr))
+ return 1;
+ printf_debug("RES returned %02x.\n", readarr[0]);
+ return 0;
+}
+
void spi_write_enable()
{
const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN};
@@ -65,7 +75,7 @@ void spi_write_disable()
spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
}
-int probe_spi(struct flashchip *flash)
+int probe_spi_rdid(struct flashchip *flash)
{
unsigned char readarr[3];
uint32_t manuf_id;
@@ -102,6 +112,35 @@ int probe_spi(struct flashchip *flash)
return 0;
}
+int probe_spi_res(struct flashchip *flash)
+{
+ unsigned char readarr[3];
+ uint32_t model_id;
+ if (!spi_rdid(readarr)) {
+ /* Check if RDID returns 0xff 0xff 0xff, then we use RES. */
+ if ((readarr[0] != 0xff) || (readarr[1] != 0xff) ||
+ (readarr[2] != 0xff))
+ return 0;
+ } else {
+ /* We couldn't issue RDID, it's pointless to try RES. */
+ return 0;
+ }
+ if (!spi_res(readarr)) {
+ model_id = readarr[0];
+ printf_debug("%s: id 0x%x\n", __FUNCTION__, model_id);
+ if (model_id == flash->model_id) {
+ /* Print the status register to tell the
+ * user about possible write protection.
+ */
+ spi_prettyprint_status_register(flash);
+
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
uint8_t spi_read_status_register()
{
const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR};