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authorMats Erik Andersson <mats.andersson@gisladisker.se>2008-10-07 12:21:12 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2008-10-07 12:21:12 +0000
commit0994c397a5ef65c4ee8ae4551cc90000c4b0c857 (patch)
treee4f6bbd0cd3608e33c0122ca0cb175316ab249aa /util/flashrom
parenta643ea3beba32ed170f995b2d40169017edb1095 (diff)
downloadcoreboot-0994c397a5ef65c4ee8ae4551cc90000c4b0c857.tar.xz
Support for AM29F002(N)B[BT]. Fully tested on AM29F002NBT.
Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r--util/flashrom/flash.h2
-rw-r--r--util/flashrom/flashchips.c4
2 files changed, 5 insertions, 1 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index 1dcdbfbdb5..35f7ab4bfd 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -112,6 +112,8 @@ extern struct flashchip flashchips[];
#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
#define AMD_ID 0x01 /* AMD */
+#define AM_29F002BT 0xB0
+#define AM_29F002BB 0x34
#define AM_29F040B 0xA4
#define AM_29LV040B 0x4F
#define AM_29F016D 0xAD
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index 3862158f8c..11613494e6 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -32,6 +32,8 @@ struct flashchip flashchips[] = {
/**********************************************************************************************************************************************************************************************************************/
/* Vendor Chip Vendor ID Chip ID TODO TODO Test status Probe function Erase function Write function Read function */
/**********************************************************************************************************************************************************************************************************************/
+ {"AMD", "Am29F002(N)BB", AMD_ID, AM_29F002BB, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_en29f002a},
+ {"AMD", "Am29F002(N)BT", AMD_ID, AM_29F002BT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_en29f002a},
{"AMD", "Am29F016D", AMD_ID, AM_29F016D, 2048, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b},
{"AMD", "Am29F040B", AMD_ID, AM_29F040B, 512, 64 * 1024, TEST_OK_PREW, probe_29f040b, erase_29f040b, write_29f040b},
{"AMD", "Am29LV040B", AMD_ID, AM_29LV040B, 512, 64 * 1024, TEST_UNTESTED, probe_29f040b, erase_29f040b, write_29f040b},
@@ -40,7 +42,7 @@ struct flashchip flashchips[] = {
{"Atmel", "AT29C040A", ATMEL_ID, AT_29C040A, 512, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec},
{"Atmel", "AT49F002(N)", ATMEL_ID, AT_49F002N, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002},
{"Atmel", "AT49F002(N)T", ATMEL_ID, AT_49F002NT, 256, 256, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002},
- {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},
+ {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},
{"AMIC", "A25L40P", AMIC_ID, AMIC_A25L40P, 512, 256, TEST_OK_PREW, probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read},
{"AMIC", "A29002B", AMIC_ID_NOPREFIX, AMIC_A29002B, 256, 64 * 1024, TEST_UNTESTED, probe_29f002, erase_29f002, write_29f002},
{"AMIC", "A29002T", AMIC_ID_NOPREFIX, AMIC_A29002T, 256, 64 * 1024, TEST_OK_PREW, probe_29f002, erase_29f002, write_29f002},