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author | Rudolf Marek <r.marek@assembler.cz> | 2008-06-30 21:38:30 +0000 |
---|---|---|
committer | Rudolf Marek <r.marek@assembler.cz> | 2008-06-30 21:38:30 +0000 |
commit | 4a17e02003f40495b37393b017e7c9ea4bb85638 (patch) | |
tree | 469840e1fa670fced0e7a9f4793d64de7dd2c3a3 /util/flashrom | |
parent | 7b425c1c1115f258107bad368a1b1f7345a7254b (diff) | |
download | coreboot-4a17e02003f40495b37393b017e7c9ea4bb85638.tar.xz |
This patch adds support for VIA SPI controller on VT8237S. It is similar with
few documented exceptions to ICH7 SPI controller.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r-- | util/flashrom/chipset_enable.c | 20 | ||||
-rw-r--r-- | util/flashrom/flash.h | 1 | ||||
-rw-r--r-- | util/flashrom/ichspi.c | 70 | ||||
-rw-r--r-- | util/flashrom/spi.c | 12 |
4 files changed, 71 insertions, 32 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index dc6d8bc180..1d0c006444 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -187,6 +187,24 @@ static int enable_flash_ich_dc(struct pci_dev *dev, const char *name) void *ich_spibar = NULL; +static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) { + uint32_t mmio_base; + + mmio_base = (pci_read_long(dev, 0xbc)) << 8; + printf_debug("MMIO base at = 0x%x\n", mmio_base); + ich_spibar = mmap(NULL, 0x70, PROT_READ | PROT_WRITE, MAP_SHARED, + fd_mem, mmio_base); + + if (ich_spibar == MAP_FAILED) { + perror("Can't mmap memory using " MEM_DEV); + exit(1); + } + + printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n", *(uint16_t *)(ich_spibar + 0x6c)); + viaspi_detected = 1; + return 0; +} + static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsigned long spibar) { uint8_t old, new, bbs, buc; @@ -270,6 +288,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign /* Flag for ICH7 SPI register block */ int ich7_detected = 0; +int viaspi_detected = 0; static int enable_flash_ich7(struct pci_dev *dev, const char *name) { @@ -660,6 +679,7 @@ static const FLASH_ENABLE enables[] = { {0x1106, 0x8231, "VIA VT8231", enable_flash_vt823x}, {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, + {0x1106, 0x3372, "VIA VT8237S", enable_flash_vt8237s_spi}, {0x1106, 0x8324, "VIA CX700", enable_flash_vt823x}, {0x1106, 0x0686, "VIA VT82C686", enable_flash_amd8111}, {0x1078, 0x0100, "AMD CS5530(A)", enable_flash_cs5530}, diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index 9847fd3dfd..98804def33 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -371,6 +371,7 @@ void print_supported_boards(void); int chipset_flash_enable(void); void print_supported_chipsets(void); extern int ich7_detected; +extern int viaspi_detected; extern int ich9_detected; extern void *ich_spibar; diff --git a/util/flashrom/ichspi.c b/util/flashrom/ichspi.c index 7cc9ca7433..91a3842b2f 100644 --- a/util/flashrom/ichspi.c +++ b/util/flashrom/ichspi.c @@ -41,8 +41,6 @@ #include "flash.h" #include "spi.h" -#define MAXDATABYTES 0x40 - /* ICH9 controller register definition */ #define ICH9_REG_FADDR 0x08 /* 32 Bits */ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ @@ -81,11 +79,21 @@ #define SPIS_CDS 0x00000004 #define SPIS_FCERR 0x00000008 +/* VIA SPI is compatible with ICH7, but maxdata + to transfer is 16 bytes. + + DATA byte count on ICH7 is 8:13, on VIA 8:11 + + bit 12 is port select CS0 CS1 + bit 13 is FAST READ enable + bit 7 is used with fast read and one shot controls CS de-assert? +*/ + #define ICH7_REG_SPIC 0x02 /* 16 Bits */ #define SPIC_SCGO 0x0002 #define SPIC_ACS 0x0004 #define SPIC_SPOP 0x0008 -#define SPIC_DS 0x4000 +#define SPIC_DS 0x4000 #define ICH7_REG_SPIA 0x04 /* 32 Bits */ #define ICH7_REG_SPID0 0x08 /* 64 Bytes */ @@ -143,9 +151,9 @@ static int program_opcodes(OPCODES * op); static int run_opcode(uint8_t nr, OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data); static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, - int offset); + int offset, int maxdata); static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset); + int offset, int maxdata); static int ich_spi_erase_block(struct flashchip *flash, int offset); OPCODES O_ST_M25P = { @@ -176,7 +184,7 @@ int program_opcodes(OPCODES * op) temp16 = (op->preop[0]); /* 8:16 Prefix Opcode 2 */ temp16 |= ((uint16_t) op->preop[1]) << 8; - if (ich7_detected) { + if ((ich7_detected) || (viaspi_detected)) { REGWRITE16(ICH7_REG_PREOP, temp16); } else if (ich9_detected) { REGWRITE16(ICH9_REG_PREOP, temp16); @@ -188,7 +196,7 @@ int program_opcodes(OPCODES * op) temp16 |= ((uint16_t) op->opcode[a].spi_type) << (a * 2); } - if (ich7_detected) { + if ((ich7_detected) || (viaspi_detected)) { REGWRITE16(ICH7_REG_OPTYPE, temp16); } else if (ich9_detected) { REGWRITE16(ICH9_REG_OPTYPE, temp16); @@ -201,7 +209,7 @@ int program_opcodes(OPCODES * op) temp32 |= ((uint32_t) op->opcode[a].opcode) << (a * 8); } - if (ich7_detected) { + if ((ich7_detected) || (viaspi_detected)) { REGWRITE32(ICH7_REG_OPMENU, temp32); } else if (ich9_detected) { REGWRITE32(ICH9_REG_OPMENU, temp32); @@ -215,7 +223,7 @@ int program_opcodes(OPCODES * op) ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); } - if (ich7_detected) { + if ((ich7_detected) || (viaspi_detected)) { REGWRITE32(ICH7_REG_OPMENU + 4, temp32); } else if (ich9_detected) { REGWRITE32(ICH9_REG_OPMENU + 4, temp32); @@ -225,7 +233,7 @@ int program_opcodes(OPCODES * op) } static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset, - uint8_t datalength, uint8_t * data) + uint8_t datalength, uint8_t * data, int maxdata) { int write_cmd = 0; int timeout; @@ -275,7 +283,7 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset, if (datalength != 0) { temp16 |= SPIC_DS; - temp16 |= ((uint16_t) ((datalength - 1) & 0x3f)) << 8; + temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8; } /* Select opcode */ @@ -431,10 +439,11 @@ static int run_opcode(uint8_t nr, OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data) { if (ich7_detected) - return ich7_run_opcode(nr, op, offset, datalength, data); - else if (ich9_detected) { + return ich7_run_opcode(nr, op, offset, datalength, data, 64); + else if (viaspi_detected) + return ich7_run_opcode(nr, op, offset, datalength, data, 16); + else if (ich9_detected) return ich9_run_opcode(nr, op, offset, datalength, data); - } /* If we ever get here, something really weird happened */ return -1; @@ -455,7 +464,7 @@ static int ich_spi_erase_block(struct flashchip *flash, int offset) return 0; } -static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset) +static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, int maxdata) { int page_size = flash->page_size; uint32_t remaining = flash->page_size; @@ -464,8 +473,8 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset) printf_debug("ich_spi_read_page: offset=%d, number=%d, buf=%p\n", offset, page_size, buf); - for (a = 0; a < page_size; a += MAXDATABYTES) { - if (remaining < MAXDATABYTES) { + for (a = 0; a < page_size; a += maxdata) { + if (remaining < maxdata) { if (run_opcode (1, curopcodes->opcode[1], @@ -478,12 +487,12 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset) } else { if (run_opcode (1, curopcodes->opcode[1], - offset + (page_size - remaining), MAXDATABYTES, + offset + (page_size - remaining), maxdata, &buf[page_size - remaining]) != 0) { printf_debug("Error reading"); return 1; } - remaining -= MAXDATABYTES; + remaining -= maxdata; } } @@ -491,7 +500,7 @@ static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset) } static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, - int offset) + int offset, int maxdata) { int page_size = flash->page_size; uint32_t remaining = page_size; @@ -500,8 +509,8 @@ static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, printf_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n", offset, page_size, bytes); - for (a = 0; a < page_size; a += MAXDATABYTES) { - if (remaining < MAXDATABYTES) { + for (a = 0; a < page_size; a += maxdata) { + if (remaining < maxdata) { if (run_opcode (0, curopcodes->opcode[0], offset + (page_size - remaining), remaining, @@ -513,12 +522,12 @@ static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, } else { if (run_opcode (0, curopcodes->opcode[0], - offset + (page_size - remaining), MAXDATABYTES, + offset + (page_size - remaining), maxdata, &bytes[page_size - remaining]) != 0) { printf_debug("Error writing"); return 1; } - remaining -= MAXDATABYTES; + remaining -= maxdata; } } @@ -530,10 +539,15 @@ int ich_spi_read(struct flashchip *flash, uint8_t * buf) int i, rc = 0; int total_size = flash->total_size * 1024; int page_size = flash->page_size; + int maxdata = 64; + + if (viaspi_detected) { + maxdata = 16; + } for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { rc = ich_spi_read_page(flash, (void *)(buf + i * page_size), - i * page_size); + i * page_size, maxdata); } return rc; @@ -545,6 +559,7 @@ int ich_spi_write(struct flashchip *flash, uint8_t * buf) int total_size = flash->total_size * 1024; int page_size = flash->page_size; int erase_size = 64 * 1024; + int maxdata = 64; spi_disable_blockprotect(); @@ -557,9 +572,12 @@ int ich_spi_write(struct flashchip *flash, uint8_t * buf) break; } + if (viaspi_detected) { + maxdata = 16; + } for (j = 0; j < erase_size / page_size; j++) { ich_spi_write_page(flash, (void *)(buf + (i * erase_size) + (j * page_size)), - (i * erase_size) + (j * page_size)); + (i * erase_size) + (j * page_size), maxdata); } } diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c index 1de02a4d6d..60fa99028e 100644 --- a/util/flashrom/spi.c +++ b/util/flashrom/spi.c @@ -36,8 +36,8 @@ int spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char { if (it8716f_flashport) return it8716f_spi_command(writecnt, readcnt, writearr, readarr); - else if (ich7_detected) - return ich_spi_command(writecnt, readcnt, writearr, readarr); + else if ((ich7_detected) || (viaspi_detected)) + return ich_spi_command(writecnt, readcnt, writearr, readarr); else if (ich9_detected) return ich_spi_command(writecnt, readcnt, writearr, readarr); printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__); @@ -360,8 +360,8 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf) { if (it8716f_flashport) return it8716f_spi_chip_read(flash, buf); - else if (ich7_detected) - return ich_spi_read(flash, buf); + else if ((ich7_detected) || (viaspi_detected)) + return ich_spi_read(flash, buf); else if (ich9_detected) return ich_spi_read(flash, buf); printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__); @@ -372,8 +372,8 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf) { if (it8716f_flashport) return it8716f_spi_chip_write(flash, buf); - else if (ich7_detected) - return ich_spi_write(flash, buf); + else if ((ich7_detected) || (viaspi_detected)) + return ich_spi_write(flash, buf); else if (ich9_detected) return ich_spi_write(flash, buf); printf_debug("%s called, but no SPI chipset detected\n", __FUNCTION__); |