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authorPeter Stuge <peter@stuge.se>2008-07-07 06:38:51 +0000
committerPeter Stuge <peter@stuge.se>2008-07-07 06:38:51 +0000
commita4793182e892c71660e24dbe12198a653f7ec1e6 (patch)
treec3e5bb7b62a251f94b1da1b0c9fd623c8286a013 /util/flashrom
parent5dc95de5e64638d5b95d7fd1fb7ef87887bfdbdc (diff)
downloadcoreboot-a4793182e892c71660e24dbe12198a653f7ec1e6.tar.xz
flashrom: Trivial SPI cleanups
While writing a new SPI driver I fixed some things in the SPI code: All calls to spi_command() had unneccessary #define duplications, and in some cases the read count define could theoretically become harmful because NULL was passed for the read buffer. Avoid a crash, should someone change the #defines. I also noticed that the only caller of spi_page_program() was the it87 driver, and spi_page_program() could only call back into the it87 driver. Removed the function for easier-to-follow code and made it8716f_spi_page_program() static. The ichspi driver's static page functions are already static. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r--util/flashrom/flash.h2
-rw-r--r--util/flashrom/it87spi.c4
-rw-r--r--util/flashrom/spi.c39
-rw-r--r--util/flashrom/spi.h2
4 files changed, 15 insertions, 32 deletions
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index cfe3062944..a810a7c2d7 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -423,7 +423,6 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf);
uint8_t spi_read_status_register();
void spi_disable_blockprotect(void);
void spi_byte_program(int address, uint8_t byte);
-void spi_page_program(int block, uint8_t *buf, uint8_t *bios);
void spi_nbyte_read(int address, uint8_t *bytes, int len);
/* 82802ab.c */
@@ -447,7 +446,6 @@ int it87xx_probe_spi_flash(const char *name);
int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf);
int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf);
-void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios);
/* jedec.c */
uint8_t oddparity(uint8_t val);
diff --git a/util/flashrom/it87spi.c b/util/flashrom/it87spi.c
index e6cd9d6af6..d1dd1d643f 100644
--- a/util/flashrom/it87spi.c
+++ b/util/flashrom/it87spi.c
@@ -192,7 +192,7 @@ int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsig
}
/* Page size is usually 256 bytes */
-void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
+static void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
int i;
spi_write_enable();
@@ -261,7 +261,7 @@ int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
it8716f_over512k_spi_chip_write(flash, buf);
} else {
for (i = 0; i < total_size / 256; i++) {
- spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
+ it8716f_spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
}
}
return 0;
diff --git a/util/flashrom/spi.c b/util/flashrom/spi.c
index d89bef6ea4..6de9da97ac 100644
--- a/util/flashrom/spi.c
+++ b/util/flashrom/spi.c
@@ -51,7 +51,7 @@ static int spi_rdid(unsigned char *readarr, int bytes)
{
const unsigned char cmd[JEDEC_RDID_OUTSIZE] = {JEDEC_RDID};
- if (spi_command(JEDEC_RDID_OUTSIZE, bytes, cmd, readarr))
+ if (spi_command(sizeof(cmd), bytes, cmd, readarr))
return 1;
printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], readarr[2]);
return 0;
@@ -61,7 +61,7 @@ static int spi_res(unsigned char *readarr)
{
const unsigned char cmd[JEDEC_RES_OUTSIZE] = {JEDEC_RES, 0, 0, 0};
- if (spi_command(JEDEC_RES_OUTSIZE, JEDEC_RES_INSIZE, cmd, readarr))
+ if (spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr))
return 1;
printf_debug("RES returned %02x.\n", readarr[0]);
return 0;
@@ -72,7 +72,7 @@ void spi_write_enable()
const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN};
/* Send WREN (Write Enable) */
- spi_command(JEDEC_WREN_OUTSIZE, JEDEC_WREN_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
}
void spi_write_disable()
@@ -80,7 +80,7 @@ void spi_write_disable()
const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = {JEDEC_WRDI};
/* Send WRDI (Write Disable) */
- spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
}
static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
@@ -182,10 +182,10 @@ int probe_spi_res(struct flashchip *flash)
uint8_t spi_read_status_register()
{
const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR};
- unsigned char readarr[1];
+ unsigned char readarr[JEDEC_RDSR_INSIZE];
/* Read Status Register */
- spi_command(JEDEC_RDSR_OUTSIZE, JEDEC_RDSR_INSIZE, cmd, readarr);
+ spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
return readarr[0];
}
@@ -273,7 +273,7 @@ int spi_chip_erase_c7(struct flashchip *flash)
spi_disable_blockprotect();
spi_write_enable();
/* Send CE (Chip Erase) */
- spi_command(JEDEC_CE_C7_OUTSIZE, JEDEC_CE_C7_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
/* Wait until the Write-In-Progress bit is cleared.
* This usually takes 1-85 s, so wait in 1 s steps.
*/
@@ -296,7 +296,7 @@ int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr)
cmd[3] = (addr & 0x000000ff);
spi_write_enable();
/* Send BE (Block Erase) */
- spi_command(JEDEC_BE_D8_OUTSIZE, JEDEC_BE_D8_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
/* Wait until the Write-In-Progress bit is cleared.
* This usually takes 100-4000 ms, so wait in 100 ms steps.
*/
@@ -315,7 +315,7 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
spi_write_enable();
/* Send SE (Sector Erase) */
- spi_command(JEDEC_SE_OUTSIZE, JEDEC_SE_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
/* Wait until the Write-In-Progress bit is cleared.
* This usually takes 15-800 ms, so wait in 10 ms steps.
*/
@@ -324,21 +324,6 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
return 0;
}
-void spi_page_program(int block, uint8_t *buf, uint8_t *bios)
-{
- switch (flashbus) {
- case BUS_TYPE_IT87XX_SPI:
- it8716f_spi_page_program(block, buf, bios);
- break;
- case BUS_TYPE_ICH7_SPI:
- case BUS_TYPE_ICH9_SPI:
- printf_debug("%s called, but not implemented for ICH\n", __FUNCTION__);
- break;
- default:
- printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__);
- }
-}
-
/*
* This is according the SST25VF016 datasheet, who knows it is more
* generic that this...
@@ -348,7 +333,7 @@ void spi_write_status_register(int status)
const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = {JEDEC_WRSR, (unsigned char)status};
/* Send WRSR (Write Status Register) */
- spi_command(JEDEC_WRSR_OUTSIZE, JEDEC_WRSR_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
}
void spi_byte_program(int address, uint8_t byte)
@@ -361,7 +346,7 @@ void spi_byte_program(int address, uint8_t byte)
};
/* Send Byte-Program */
- spi_command(JEDEC_BYTE_PROGRAM_OUTSIZE, JEDEC_BYTE_PROGRAM_INSIZE, cmd, NULL);
+ spi_command(sizeof(cmd), 0, cmd, NULL);
}
void spi_disable_blockprotect(void)
@@ -386,7 +371,7 @@ void spi_nbyte_read(int address, uint8_t *bytes, int len)
};
/* Send Read */
- spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes);
+ spi_command(sizeof(cmd), len, cmd, bytes);
}
int spi_chip_read(struct flashchip *flash, uint8_t *buf)
diff --git a/util/flashrom/spi.h b/util/flashrom/spi.h
index f5c877cdcb..429ca6f013 100644
--- a/util/flashrom/spi.h
+++ b/util/flashrom/spi.h
@@ -49,7 +49,7 @@
#define JEDEC_CE_60_OUTSIZE 0x01
#define JEDEC_CE_60_INSIZE 0x00
-/* Chip Erase 0xc7 is supported by ST/EON/Macronix chips. */
+/* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */
#define JEDEC_CE_C7 0xc7
#define JEDEC_CE_C7_OUTSIZE 0x01
#define JEDEC_CE_C7_INSIZE 0x00