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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2007-10-17 22:30:07 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2007-10-17 22:30:07 +0000
commit84453c02f7b5e8c7981370db98ab53f283885f8e (patch)
treeead5ef114cb93005eeb5be62b333128517df630c /util/flashrom
parentfb0b3e77875de57d52abdbc8bd77caea24e88a5e (diff)
downloadcoreboot-84453c02f7b5e8c7981370db98ab53f283885f8e.tar.xz
Fix wrong values/typos in chipset_enable.c. This has been confirmed by
Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r--util/flashrom/chipset_enable.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c
index 8a4fd56f51..ab9a92c9c7 100644
--- a/util/flashrom/chipset_enable.c
+++ b/util/flashrom/chipset_enable.c
@@ -381,7 +381,7 @@ static int enable_flash_mcp55(struct pci_dev *dev, char *name)
/* dump_pci_device(dev); */
- /* Set the 4MB enable bit bit */
+ /* Set the 0-16 MB enable bits */
byte = pci_read_byte(dev, 0x88);
byte |= 0xff; /* 256K */
pci_write_byte(dev, 0x88, byte);
@@ -389,7 +389,7 @@ static int enable_flash_mcp55(struct pci_dev *dev, char *name)
byte |= 0xff; /* 1M */
pci_write_byte(dev, 0x8c, byte);
word = pci_read_word(dev, 0x90);
- word |= 0x7fff; /* 15M */
+ word |= 0x7fff; /* 16M */
pci_write_word(dev, 0x90, word);
old = pci_read_byte(dev, 0x6d);