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authorPeter Stuge <peter@stuge.se>2008-07-21 17:48:40 +0000
committerPeter Stuge <peter@stuge.se>2008-07-21 17:48:40 +0000
commitec9e6e33a4d08c4b5afcc51cc5a964e1208731fc (patch)
tree6f2933f17ba02d3a447b0113ade0e87aa338e3d4 /util/flashrom
parent3d135e603343431aaef3ed770ddf16fcef4847ad (diff)
downloadcoreboot-ec9e6e33a4d08c4b5afcc51cc5a964e1208731fc.tar.xz
flashrom: Winbond W39V040C and MSI K8T Neo2-F
W39V040C does standard JEDEC commands except chip erase so add a small driver. probe_w39v040c() prints the block lock pin status when a chip is found. The Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs. Many thanks to Daniel McLellan for testing all of this on hardware! Build tested by Uwe. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3431 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/flashrom')
-rw-r--r--util/flashrom/Makefile2
-rw-r--r--util/flashrom/board_enable.c8
-rw-r--r--util/flashrom/flash.h5
-rw-r--r--util/flashrom/flashchips.c1
-rw-r--r--util/flashrom/w39v040c.c98
5 files changed, 113 insertions, 1 deletions
diff --git a/util/flashrom/Makefile b/util/flashrom/Makefile
index b47d916822..b3ed739f67 100644
--- a/util/flashrom/Makefile
+++ b/util/flashrom/Makefile
@@ -29,7 +29,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o \
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
- ichspi.o
+ ichspi.o w39v040c.o
all: pciutils dep $(PROGRAM)
diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c
index 9add36685a..f267787f44 100644
--- a/util/flashrom/board_enable.c
+++ b/util/flashrom/board_enable.c
@@ -114,6 +114,7 @@ static int w83627hf_gpio24_raise_2e(const char *name)
* Winbond W83627THF: GPIO 4, bit 4
*
* Suited for:
+ * - MSI K8T Neo2-F
* - MSI K8N-NEO3
*/
static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
@@ -141,6 +142,11 @@ static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
return 0;
}
+static int w83627thf_gpio4_4_raise_2e(const char *name)
+{
+ return w83627thf_gpio4_4_raise(0x2e, name);
+}
+
static int w83627thf_gpio4_4_raise_4e(const char *name)
{
return w83627thf_gpio4_4_raise(0x4e, name);
@@ -617,6 +623,8 @@ struct board_pciid_enable board_pciid_enables[] = {
NULL, NULL, "BioStar P4M80-M4", board_biostar_p4m80_m4},
{0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000,
NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4},
+ {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c,
+ NULL, NULL, "MSI K8T Neo2", w83627thf_gpio4_4_raise_2e},
{0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL} /* Keep this */
};
diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h
index a810a7c2d7..7e1fab7eb3 100644
--- a/util/flashrom/flash.h
+++ b/util/flashrom/flash.h
@@ -517,6 +517,11 @@ int probe_sst_fwhub(struct flashchip *flash);
int erase_sst_fwhub(struct flashchip *flash);
int write_sst_fwhub(struct flashchip *flash, uint8_t *buf);
+/* w39v040c.c */
+int probe_w39v040c(struct flashchip *flash);
+int erase_w39v040c(struct flashchip *flash);
+int write_w39v040c(struct flashchip *flash, uint8_t *buf);
+
/* w39V080fa.c */
int probe_winbond_fwhub(struct flashchip *flash);
int erase_winbond_fwhub(struct flashchip *flash);
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index b63e425118..a2d36787c7 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -132,6 +132,7 @@ struct flashchip flashchips[] = {
{"Winbond", "W29EE011", WINBOND_ID, W_29C011, 128, 128, TEST_OK_PREW, probe_w29ee011, erase_chip_jedec, write_jedec},
{"Winbond", "W39V040A", WINBOND_ID, W_39V040A, 512, 64*1024, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_39sf020},
{"Winbond", "W39V040B", WINBOND_ID, W_39V040B, 512, 64*1024, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020},
+ {"Winbond", "W39V040C", 0xda, 0x50, 512, 64*1024, TEST_OK_PREW, probe_w39v040c, erase_w39v040c, write_w39v040c},
{"Winbond", "W39V040FA", WINBOND_ID, W_39V040FA, 512, 64*1024, TEST_OK_PR, probe_jedec, erase_chip_jedec, write_39sf020},
{"Winbond", "W39V080A", WINBOND_ID, W_39V080A, 1024, 64*1024, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_39sf020},
{"Winbond", "W49F002U", WINBOND_ID, W_49F002U, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_49f002},
diff --git a/util/flashrom/w39v040c.c b/util/flashrom/w39v040c.c
new file mode 100644
index 0000000000..ce025969f7
--- /dev/null
+++ b/util/flashrom/w39v040c.c
@@ -0,0 +1,98 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2008 Peter Stuge <peter@stuge.se>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdio.h>
+#include "flash.h"
+
+int probe_w39v040c(struct flashchip *flash)
+{
+ volatile uint8_t *bios = flash->virtual_memory;
+ uint8_t id1, id2, lock;
+
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ myusec_delay(10);
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ myusec_delay(10);
+ *(volatile uint8_t *)(bios + 0x5555) = 0x90;
+ myusec_delay(10);
+
+ id1 = *(volatile uint8_t *)bios;
+ id2 = *(volatile uint8_t *)(bios + 1);
+ lock = *(volatile uint8_t *)(bios + 0xfff2);
+
+ *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
+ myusec_delay(10);
+ *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
+ myusec_delay(10);
+ *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
+ myusec_delay(40);
+
+ printf_debug("%s: id1 0x%x, id2 0x%x", __func__, id1, id2);
+ if (!oddparity(id1))
+ printf_debug(", id1 parity violation");
+ printf_debug("\n");
+ if (flash->manufacture_id == id1 && flash->model_id == id2) {
+ printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n",
+ __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un");
+ return 1;
+ }
+
+ return 0;
+}
+
+int erase_w39v040c(struct flashchip *flash)
+{
+ int i;
+ unsigned int total_size = flash->total_size * 1024;
+ volatile uint8_t *bios = flash->virtual_memory;
+
+ for (i = 0; i < total_size; i += flash->page_size)
+ erase_sector_jedec(flash->virtual_memory, i);
+
+ for (i = 0; i < total_size; i++)
+ if (0xff != bios[i]) {
+ printf("ERASE FAILED at 0x%08x! Expected=0xff, Read=0x%02x\n", i, bios[i]);
+ return -1;
+ }
+
+ return 0;
+}
+
+int write_w39v040c(struct flashchip *flash, uint8_t *buf)
+{
+ int i;
+ int total_size = flash->total_size * 1024;
+ int page_size = flash->page_size;
+ volatile uint8_t *bios = flash->virtual_memory;
+
+ if (flash->erase(flash))
+ return -1;
+
+ printf("Programming page: ");
+ for (i = 0; i < total_size / page_size; i++) {
+ printf("%04d at address: 0x%08x", i, i * page_size);
+ write_sector_jedec(bios, buf + i * page_size,
+ bios + i * page_size, page_size);
+ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+ }
+ printf("\n");
+
+ return 0;
+}