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| author | Nico Huber <nico.h@gmx.de> | 2020-05-20 01:02:18 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-26 15:14:21 +0000 |
| commit | f531244d20998091bd8c311a4183de0bcc9f6ff2 (patch) | |
| tree | 776d05c247f9fad5c6d603525fc2a22b92b69690 /util/fuzz-tests | |
| parent | 730b2616aa3c24d6ee9da5cf00ba7f0248776cbd (diff) | |
| download | coreboot-f531244d20998091bd8c311a4183de0bcc9f6ff2.tar.xz | |
device/pci: Handle unassigned bus resources gracefully
The I/O windows of PCI bridges can be disabled individually by
setting their limit lower than their base. Always do this if a
resource wasn't assigned a value.
Change-Id: I73f6817c4b12cb1689627044735d1fed6d825afe
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/fuzz-tests')
0 files changed, 0 insertions, 0 deletions