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authorLi-Ta Lo <ollie@lanl.gov>2004-04-14 22:24:50 +0000
committerLi-Ta Lo <ollie@lanl.gov>2004-04-14 22:24:50 +0000
commit6463ae7f1bd1f7ab60725529cf79af30a0e7297d (patch)
treee8ddaba7c8da40c8f125149b0c3457c48550f619 /util/getpir/code_gen.c
parent815a80316448f72ec9501da5c545595c30880e70 (diff)
downloadcoreboot-6463ae7f1bd1f7ab60725529cf79af30a0e7297d.tar.xz
seperate checksum and code generating code.
use mmap instead of file io git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1504 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/getpir/code_gen.c')
-rw-r--r--util/getpir/code_gen.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/util/getpir/code_gen.c b/util/getpir/code_gen.c
new file mode 100644
index 0000000000..32528633a0
--- /dev/null
+++ b/util/getpir/code_gen.c
@@ -0,0 +1,55 @@
+#include <stdio.h>
+#include <arch/pirq_routing.h>
+
+static char *preamble[] = {
+ "/* This file was generated by getpir.c, do not modify! \n (but if you do, please run checkpir on it to verify)\n",
+ " * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up\n",
+ " *\n",
+ " * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM\n*/\n\n",
+ "#include <arch/pirq_routing.h>\n\n",
+ "const struct irq_routing_table intel_irq_routing_table = {\n",
+ "\tPIRQ_SIGNATURE, /* u32 signature */\n",
+ "\tPIRQ_VERSION, /* u16 version */\n",
+ 0
+};
+
+void code_gen(FILE * fpir, struct irq_routing_table *rt)
+{
+ char **code = preamble;
+ struct irq_info *se_arr = (struct irq_info *) ((char *) rt + 32);
+ int i, ts = (rt->size - 32) / 16;
+
+ while (*code)
+ fprintf(fpir, "%s", *code++);
+
+
+ fprintf(fpir, "\t32+16*%d, /* there can be total %d devices on the bus */\n",
+ ts, ts);
+ fprintf(fpir, "\t0x%02x, /* Where the interrupt router lies (bus) */\n",
+ rt->rtr_bus);
+ fprintf(fpir, "\t(0x%02x<<3)|0x%01x, /* Where the interrupt router lies (dev) */\n",
+ rt->rtr_devfn >> 3, rt->rtr_devfn & 7);
+ fprintf(fpir, "\t%#x, /* IRQs devoted exclusively to PCI usage */\n",
+ rt->exclusive_irqs);
+ fprintf(fpir, "\t%#x, /* Vendor */\n", rt->rtr_vendor);
+ fprintf(fpir, "\t%#x, /* Device */\n", rt->rtr_device);
+ fprintf(fpir, "\t%#x, /* Crap (miniport) */\n",
+ rt->miniport_data);
+ fprintf(fpir, "\t{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */\n");
+ fprintf(fpir, "\t%#x, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */\n",
+ rt->checksum);
+ fprintf(fpir, "\t{\n");
+ fprintf(fpir, "\t\t/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */\n");
+ for (i = 0; i < ts; i++) {
+ fprintf(fpir, "\t\t{0x%02x,(0x%02x<<3)|0x%01x, {{0x%02x, 0x%04x}, {0x%02x, 0x%04x}, {0x%02x, 0x%04x}, {0x%02x, 0x0%04x}}, 0x%x, 0x%x},\n",
+ (se_arr+i)->bus, (se_arr+i)->devfn >> 3,
+ (se_arr+i)->devfn & 7, (se_arr+i)->irq[0].link,
+ (se_arr+i)->irq[0].bitmap, (se_arr+i)->irq[1].link,
+ (se_arr+i)->irq[1].bitmap, (se_arr+i)->irq[2].link,
+ (se_arr+i)->irq[2].bitmap, (se_arr+i)->irq[3].link,
+ (se_arr+i)->irq[3].bitmap, (se_arr+i)->slot,
+ (se_arr+i)->rfu);
+ }
+ fprintf(fpir, "\t}\n");
+ fprintf(fpir, "};\n");
+}