inteltool: new definitions and cleanup

 - Separate host bridges/DRAM controllers from LPC controllers in supported_chips_list[].
 - Refine some names and macros.
 - Clean up some whitespace errors.

 - Add IDs and names of 5, 6 and 7 Series southbridges and the three
   latest Core CPU families with integrated memory controllers but do
   not implement any pretty printing routines for them yet.

   The first generation Core family is already supported, although it
   was wrongly named after the PCH and used the wrong ID. Also, the BAR
   values have been mangled to 32b instead of 64b. Both errors have been
   fixed and most basic support for the other two generations was added.

Change-Id: Ief81e57f7c065cafac52e48b6364b57c72fcdf95
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1574
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>

1 files changed, 95 insertions, 33 deletions

diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c
index 56bbc4a458..2d99863621 100644
--- a/util/inteltool/inteltool.c
+++ b/util/inteltool/inteltool.c
@@ -30,36 +30,54 @@
 #include <unistd.h>
 #endif
 
+/*
+ * http://pci-ids.ucw.cz/read/PC/8086
+ * http://en.wikipedia.org/wiki/Intel_Tick-Tock
+ * http://en.wikipedia.org/wiki/List_of_Intel_chipsets
+ * http://en.wikipedia.org/wiki/Intel_Xeon_chipsets
+ */
 static const struct {
 	uint16_t vendor_id, device_id;
 	char *name;
 } supported_chips_list[] = {
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX, "82443LX" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX, "82443BX" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "82443BX without AGP" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "i810" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810DC, "i810-DC100" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_MC, "i810E DC-133" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "i830M" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865, "i865" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "82915G/P/GV/GL/PL/910GL" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GSE, "i945GSE" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q965, "Q963/965" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" },
+	/* Host bridges/DRAM controllers (Northbridges) */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX, "443LX" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX, "443BX" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "443BX without AGP" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "810" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_DC, "810-DC100" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_DC, "810E DC-133" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "830M" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "845" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865, "865" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "915G/P/GV/GL/PL/910GL" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "945P" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "945GM" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GSE, "945GSE" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82965PM, "965PM" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q965, "Q963/82Q965" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "975X" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM65E, "HM65 Express" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GS45, "GS45ME" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82X38, "X38/X48" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_32X0, "3200/3210" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82X4X, "GL40/GS40/GM45/GS45/PM45" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82X58, "X58" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000P, "Intel i5000P Memory Controller Hub" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000X, "Intel i5000X Memory Controller Hub" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000Z, "Intel i5000Z Memory Controller Hub" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000V, "Intel i5000V Memory Controller Hub" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO, "SCH Poulsbo" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_DXXX, "Atom D400/500 Series" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_NXXX, "Atom N400 Series" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO, "SCH Poulsbo" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC, "SCH Poulsbo" },
+	/* Host bridges /DRAM controllers integrated in CPUs */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_1ST_GEN, "1st generation (Westmere family) Core Processor" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_2ND_GEN, "2nd generation (Sandy Bridge family) Core Processor" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_3RD_GEN, "3rd generation (Ivy Bridge family) Core Processor" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_4TH_GEN, "4th generation (Haswell family) Core Processor" },
+	/* Southbridges (LPC controllers) */
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" },
@@ -81,14 +99,58 @@ static const struct {
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2, "ICH2" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" },
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X44, "82X38/X48" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_32X0, "3200/3210" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I63XX, "Intel 63xx I/O Controller Hub" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000P, "Intel i5000P Memory Controller Hub" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000X, "Intel i5000X Memory Controller Hub" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000Z, "Intel i5000Z Memory Controller Hub" },
-	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000V, "Intel i5000V Memory Controller Hub" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I63XX, "631xESB/632xESB/3100" },
+	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC, "SCH Poulsbo" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b00, "3400 Desktop" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b01, "3400 Mobile" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b02, "P55" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b03, "PM55" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b06, "H55" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b07, "QM57" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b08, "H57" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b09, "HM55" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b0a, "Q57" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b0b, "HM57" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b0d, "3400 Mobile SFF" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b0e, "B55" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b0f, "QS57" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b12, "3400" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b14, "3420" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b16, "3450" },
+	{ PCI_VENDOR_ID_INTEL, 0x3b1e, "B55" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c44, "Z68" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c46, "P67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c47, "UM67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c49, "HM65" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4a, "H67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4b, "HM67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4c, "Q65" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4d, "QS67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4e, "Q67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c4f, "QM67" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c50, "B65" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c52, "C202" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c54, "C204" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c56, "C206" },
+	{ PCI_VENDOR_ID_INTEL, 0x1c5c, "H61" },
+	{ PCI_VENDOR_ID_INTEL, 0x1d40, "X79" },
+	{ PCI_VENDOR_ID_INTEL, 0x1d41, "X79" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e44, "Z77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e46, "Z75" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e47, "Q77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e48, "Q75" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e49, "B75" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e4a, "H77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e53, "C216" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e55, "QM77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e56, "QS77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e57, "HM77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e58, "UM77" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e59, "HM76" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e5d, "HM75" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e5e, "HM70" },
+	{ PCI_VENDOR_ID_INTEL, 0x1e5f, "NM70" },
+	{ PCI_VENDOR_ID_INTEL, 0x2310, "DH89xxCC" },
 };
 
 #ifndef __DARWIN__
@@ -309,7 +371,7 @@ int main(int argc, char *argv[])
 	 * left-shifted "Extended Model" fields.
 	 * http://download.intel.com/design/processor/applnots/24161832.pdf
 	 */
-	printf("Intel CPU: Processor Type: %x, Family %x, Model %x, Stepping %x\n",
+	printf("CPU: Processor Type: %x, Family %x, Model %x, Stepping %x\n",
 			(id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff),
 			((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf));
 
@@ -321,10 +383,10 @@ int main(int argc, char *argv[])
 		if (sb->device_id == supported_chips_list[i].device_id)
 			sbname = supported_chips_list[i].name;
 
-	printf("Intel Northbridge: %04x:%04x (%s)\n",
+	printf("Northbridge: %04x:%04x (%s)\n",
 		nb->vendor_id, nb->device_id, nbname);
 
-	printf("Intel Southbridge: %04x:%04x (%s)\n",
+	printf("Southbridge: %04x:%04x (%s)\n",
 		sb->vendor_id, sb->device_id, sbname);
 
 	/* Now do the deed */