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| author | Nico Huber <nico.huber@secunet.com> | 2018-11-20 12:10:29 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-11-29 21:03:24 +0000 |
| commit | 94473afcd29e0f261c54bf2c6a6fc2619d51150b (patch) | |
| tree | 6c7c6b48abcd4699e4c09d2d646b71196ae5cea6 /util/inteltool/inteltool.c | |
| parent | b59da487e19dc5d8b9426797ce09453a614f32c5 (diff) | |
| download | coreboot-94473afcd29e0f261c54bf2c6a6fc2619d51150b.tar.xz | |
util/inteltool: Add Apollo Lake LPC ID and allow to read PCRs
The P2SB (PCI to Side-Band) bridge is on a different PCI device on APL.
Hence, we have to decide based on the LPC ID which device to query.
Also fix a comment.
Change-Id: Ie20d7d2d246629d085bcf4740ba28b1e81e6a12a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/29896
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/inteltool/inteltool.c')
| -rw-r--r-- | util/inteltool/inteltool.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index d0b42794da..6966915b89 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -247,6 +247,7 @@ static const struct { { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C224, "C224"}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C226, "C226"}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H81, "H81"}, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_LPC, "Apollo Lake" }, /* Intel GPUs */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_G35_EXPRESS, "Intel(R) G35 Express Chipset Family" }, |