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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-03-14 22:39:30 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-16 14:43:22 +0000 |
| commit | 0d1366dedcba06264c7215de9f0aac10c7b02f8e (patch) | |
| tree | c0de421726c61f25ae6c61b62cfaa663b667a2d5 /util/inteltool/inteltool.h | |
| parent | 01b6b245f00a3fb498f43c8d59e144c86a51c84a (diff) | |
| download | coreboot-0d1366dedcba06264c7215de9f0aac10c7b02f8e.tar.xz | |
util/inteltool: add 6th gen. mobile core u/y series
This adds the 6th gen. mobile core u/y series.
Change-Id: I7d802452353afe568e3880765dcd340f0437b392
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39568
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/inteltool/inteltool.h')
| -rw-r--r-- | util/inteltool/inteltool.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index 1c1841c2de..950943f234 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -284,6 +284,8 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U 0x0a04 /* Haswell-ULT */ #define PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U 0x1604 /* Broadwell-ULT */ #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2 0x190f /* Skylake (Desktop) */ +#define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U 0x1904 /* Skylake (Mobile) */ +#define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y 0x190c /* Skylake (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M 0x1910 /* Skylake (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST 0x1918 /* Skylake (Workstation) */ #define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D 0x191f /* Skylake (Desktop) */ |