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authorChristoph Pomaska <cp_public@gmx.de>2018-01-01 01:48:21 +0100
committerNico Huber <nico.h@gmx.de>2018-01-10 22:04:33 +0000
commit48ac29ee4cbd159932d919a3d791cfe42d950b28 (patch)
tree304b8699a746ab60a38db9f7ef48cd339d4c39ef /util/inteltool/memory.c
parentbb9bdeb59480cade6f428237c6727d805d6c5f4c (diff)
downloadcoreboot-48ac29ee4cbd159932d919a3d791cfe42d950b28.tar.xz
util/inteltool: Add Skylake Desktop Northbridge
Add the 8086:191f North/Host Bridge to the list of definitions. Adding the definiton makes the Northbridge get recognized by inteltool. It is found in the Intel i5-6600K CPU: https://ark.intel.com/products/88191/Intel-Core-i5-6600K-Processor-6M-Cache-up-to-3_90-GHz Change-Id: Id746d1e8b3bb90b3b68a2f6c372890671dd61b5f Signed-off-by: Christoph Pomaska <cp_public@gmx.de> Reviewed-on: https://review.coreboot.org/23055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util/inteltool/memory.c')
-rw-r--r--util/inteltool/memory.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 87cd5d8f06..67a29a7e02 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -219,6 +219,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
+ case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
mchbar_phys = pci_read_long(nb, 0x48);
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;