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authorStefan Reinauer <stepan@coresystems.de>2008-08-20 13:41:24 +0000
committerStefan Reinauer <stepan@openbios.org>2008-08-20 13:41:24 +0000
commit2319027d7e3a9b44110794a553b10a554fed1102 (patch)
tree7cb5bffd1c14b6363fb17019bdd4826fd9ec726c /util/inteltool/memory.c
parenteb02f45e6ff2a6870353816712ff6271250dc7ee (diff)
downloadcoreboot-2319027d7e3a9b44110794a553b10a554fed1102.tar.xz
split the one file, as the several printing functions will continue to grow
immensly when they know more systems / cpus / chipsets Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/memory.c')
-rw-r--r--util/inteltool/memory.c69
1 files changed, 69 insertions, 0 deletions
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
new file mode 100644
index 0000000000..24a9f7c670
--- /dev/null
+++ b/util/inteltool/memory.c
@@ -0,0 +1,69 @@
+/*
+ * inteltool - dump all registers on an Intel CPU + chipset based system.
+ *
+ * Copyright (C) 2008 by coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/mman.h>
+
+#include "inteltool.h"
+
+/*
+ * (G)MCH MMIO Config Space
+ */
+int print_mchbar(struct pci_dev *nb)
+{
+ int i, size = (16 * 1024);
+ volatile uint8_t *mchbar;
+ uint32_t mchbar_phys;
+
+ printf("\n============= MCHBAR ============\n\n");
+
+ switch (nb->device_id) {
+ case PCI_DEVICE_ID_INTEL_82945GM:
+ mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
+ break;
+ case 0x1234: // Dummy for non-existent functionality
+ printf("This northbrigde does not have MCHBAR.\n");
+ return 1;
+ default:
+ printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n");
+ return 1;
+ }
+
+ mchbar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
+ fd_mem, (off_t) mchbar_phys);
+
+ if (mchbar == MAP_FAILED) {
+ perror("Error mapping MCHBAR");
+ exit(1);
+ }
+
+ printf("MCHBAR = 0x%08x (MEM)\n\n", mchbar_phys);
+
+ for (i = 0; i < size; i += 4) {
+ if (*(uint32_t *)(mchbar + i))
+ printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(mchbar+i));
+ }
+
+ munmap((void *)mchbar, size);
+ return 0;
+}
+
+