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authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-08-27 18:20:08 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-09-05 15:00:04 +0000
commit131768906698d8a452c8ededb2c36fa28f2c1ef9 (patch)
treef2add609329eb18922355cd4cf1e98ef0dcac14d /util/inteltool/memory.c
parent940fb57c06ff706f8e3ab16451548ab93aff1340 (diff)
downloadcoreboot-131768906698d8a452c8ededb2c36fa28f2c1ef9.tar.xz
inteltool: Add Skylake Xeon E DMI3 Host bridge Id
Tested on Intel S2600WF and SUPERMICRO MBD-X11DPL-I-O Change-Id: I4b429536fc2db16d770120487e4c383da437593a Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'util/inteltool/memory.c')
-rw-r--r--util/inteltool/memory.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 222ac8afb0..e80f1ba15d 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -221,6 +221,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
+ case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y: