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author | Corey Osgood <corey.osgood@gmail.com> | 2010-08-17 08:33:44 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-17 08:33:44 +0000 |
commit | f366ce05ef3eb95c6c9d84a97cde1a4026f22787 (patch) | |
tree | 87733a7ba137fc9713fb96c2655ff6eef1a21e6f /util/inteltool/rootcmplx.c | |
parent | e7b7ae23e688fb883003aed42f614bcfa977894e (diff) | |
download | coreboot-f366ce05ef3eb95c6c9d84a97cde1a4026f22787.tar.xz |
Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.
Both are tested and appear to be working, however I'm not 100% clear
on if the NM10 has any other PCI IDs.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/rootcmplx.c')
-rw-r--r-- | util/inteltool/rootcmplx.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/util/inteltool/rootcmplx.c b/util/inteltool/rootcmplx.c index b89e6a1b6b..215c150756 100644 --- a/util/inteltool/rootcmplx.c +++ b/util/inteltool/rootcmplx.c @@ -43,6 +43,8 @@ int print_rcba(struct pci_dev *sb) case PCI_DEVICE_ID_INTEL_ICH9M: case PCI_DEVICE_ID_INTEL_ICH9ME: case PCI_DEVICE_ID_INTEL_ICH8M: + case PCI_DEVICE_ID_INTEL_ICH8: + case PCI_DEVICE_ID_INTEL_NM10: rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe; break; case PCI_DEVICE_ID_INTEL_ICH: |