diff options
author | Nico Huber <nico.h@gmx.de> | 2013-04-01 15:08:04 +0200 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-04-01 22:39:04 +0200 |
commit | 09dcbf0cdbae2e9a2b26f6753c290d8c70749bba (patch) | |
tree | 1c6d78b97a288b009648ca1e1152daf2720d8a34 /util/inteltool | |
parent | d86a3a17e6fbf25e20e146aefd6925b943957bda (diff) | |
download | coreboot-09dcbf0cdbae2e9a2b26f6753c290d8c70749bba.tar.xz |
inteltool: Add option to show differences in GPIO setup
This adds an option -G, --gpio-diffs to inteltool, which shows GPIO settings
that differ from platform defaults. For differing registers, the current,
the default, and an xor of the default and the current value is printed. A
follow-up commit will add defaults for the Cougar/Panther Point platform
controller hubs. If you specify both, -g and -G on the command line, all
GPIO registers will be printed interleaved with the diff.
Here's a preview:
$ ./inteltool -G
CPU: Processor Type: 0, Family 6, Model 3a, Stepping 9
Northbridge: 8086:0150 (unknown)
Southbridge: 8086:1e4a (H77)
========== GPIO DIFFS ===========
GPIOBASE = 0x0500 (IO)
gpiobase+0x0000: 0xb96ba1fb (GPIO_USE_SEL)
gpiobase+0x0000: 0xb96ba1ff (GPIO_USE_SEL) DEFAULT
gpiobase+0x0000: 0x00000004 (GPIO_USE_SEL) DIFF
gpiobase+0x0004: 0x06ff6efb (GP_IO_SEL)
gpiobase+0x0004: 0xeeff6eff (GP_IO_SEL) DEFAULT
gpiobase+0x0004: 0xe8000004 (GP_IO_SEL) DIFF
gpiobase+0x000c: 0xe1f17f7e (GP_LVL)
gpiobase+0x000c: 0x02fe0100 (GP_LVL) DEFAULT
gpiobase+0x000c: 0xe30f7e7e (GP_LVL) DIFF
gpiobase+0x002c: 0x00002000 (GPI_INV)
gpiobase+0x002c: 0x00000000 (GPI_INV) DEFAULT
gpiobase+0x002c: 0x00002000 (GPI_INV) DIFF
gpiobase+0x0030: 0x0aff70ff (GPIO_USE_SEL2)
gpiobase+0x0030: 0x020300ff (GPIO_USE_SEL2) DEFAULT
gpiobase+0x0030: 0x08fc7000 (GPIO_USE_SEL2) DIFF
gpiobase+0x0034: 0x15038ff2 (GP_IO_SEL2)
gpiobase+0x0034: 0x1f57fff4 (GP_IO_SEL2) DEFAULT
gpiobase+0x0034: 0x0a547006 (GP_IO_SEL2) DIFF
gpiobase+0x0038: 0xb65e7f4f (GP_LVL2)
gpiobase+0x0038: 0xa4aa0007 (GP_LVL2) DEFAULT
gpiobase+0x0038: 0x12f47f48 (GP_LVL2) DIFF
gpiobase+0x0040: 0x000001f3 (GPIO_USE_SEL3)
gpiobase+0x0040: 0x00000130 (GPIO_USE_SEL3) DEFAULT
gpiobase+0x0040: 0x000000c3 (GPIO_USE_SEL3) DIFF
gpiobase+0x0044: 0x00000ef3 (GPIO_SEL3)
gpiobase+0x0044: 0x00000ff0 (GPIO_SEL3) DEFAULT
gpiobase+0x0044: 0x00000103 (GPIO_SEL3) DIFF
gpiobase+0x0048: 0x00000dfc (GPIO_LVL3)
gpiobase+0x0048: 0x000000c0 (GPIO_LVL3) DEFAULT
gpiobase+0x0048: 0x00000d3c (GPIO_LVL3) DIFF
gpiobase+0x0060: 0x00000000 (GP_RST_SEL1)
gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DEFAULT
gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DIFF
$ ./inteltool -gG
CPU: Processor Type: 0, Family 6, Model 3a, Stepping 9
Northbridge: 8086:0150 (unknown)
Southbridge: 8086:1e4a (H77)
============= GPIOS =============
GPIOBASE = 0x0500 (IO)
gpiobase+0x0000: 0xb96ba1fb (GPIO_USE_SEL)
gpiobase+0x0000: 0xb96ba1ff (GPIO_USE_SEL) DEFAULT
gpiobase+0x0000: 0x00000004 (GPIO_USE_SEL) DIFF
gpiobase+0x0004: 0x06ff6efb (GP_IO_SEL)
gpiobase+0x0004: 0xeeff6eff (GP_IO_SEL) DEFAULT
gpiobase+0x0004: 0xe8000004 (GP_IO_SEL) DIFF
gpiobase+0x0008: 0x00000000 (RESERVED)
gpiobase+0x000c: 0xe1f17f7e (GP_LVL)
gpiobase+0x000c: 0x02fe0100 (GP_LVL) DEFAULT
gpiobase+0x000c: 0xe30f7e7e (GP_LVL) DIFF
gpiobase+0x0010: 0x00000000 (RESERVED)
gpiobase+0x0014: 0x00000000 (RESERVED)
gpiobase+0x0018: 0x00040000 (GPO_BLINK)
gpiobase+0x001c: 0x00000000 (GP_SER_BLINK)
gpiobase+0x0020: 0x00080000 (GP_SB_CMDSTS)
gpiobase+0x0024: 0x00000000 (GP_SB_DATA)
gpiobase+0x0028: 0x0000 (GPI_NMI_EN)
gpiobase+0x002a: 0x0000 (GPI_NMI_STS)
gpiobase+0x002c: 0x00002000 (GPI_INV)
gpiobase+0x002c: 0x00000000 (GPI_INV) DEFAULT
gpiobase+0x002c: 0x00002000 (GPI_INV) DIFF
gpiobase+0x0030: 0x0aff70ff (GPIO_USE_SEL2)
gpiobase+0x0030: 0x020300ff (GPIO_USE_SEL2) DEFAULT
gpiobase+0x0030: 0x08fc7000 (GPIO_USE_SEL2) DIFF
gpiobase+0x0034: 0x15038ff2 (GP_IO_SEL2)
gpiobase+0x0034: 0x1f57fff4 (GP_IO_SEL2) DEFAULT
gpiobase+0x0034: 0x0a547006 (GP_IO_SEL2) DIFF
gpiobase+0x0038: 0xb65e7f4f (GP_LVL2)
gpiobase+0x0038: 0xa4aa0007 (GP_LVL2) DEFAULT
gpiobase+0x0038: 0x12f47f48 (GP_LVL2) DIFF
gpiobase+0x003c: 0x00000000 (RESERVED)
gpiobase+0x0040: 0x000001f3 (GPIO_USE_SEL3)
gpiobase+0x0040: 0x00000130 (GPIO_USE_SEL3) DEFAULT
gpiobase+0x0040: 0x000000c3 (GPIO_USE_SEL3) DIFF
gpiobase+0x0044: 0x00000ef3 (GPIO_SEL3)
gpiobase+0x0044: 0x00000ff0 (GPIO_SEL3) DEFAULT
gpiobase+0x0044: 0x00000103 (GPIO_SEL3) DIFF
gpiobase+0x0048: 0x00000dfc (GPIO_LVL3)
gpiobase+0x0048: 0x000000c0 (GPIO_LVL3) DEFAULT
gpiobase+0x0048: 0x00000d3c (GPIO_LVL3) DIFF
gpiobase+0x004c: 0x00000000 (RESERVED)
gpiobase+0x0050: 0x00000000 (RESERVED)
gpiobase+0x0054: 0x00000000 (RESERVED)
gpiobase+0x0058: 0x00000000 (RESERVED)
gpiobase+0x005c: 0x00000000 (RESERVED)
gpiobase+0x0060: 0x00000000 (GP_RST_SEL1)
gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DEFAULT
gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DIFF
gpiobase+0x0064: 0x00000000 (GP_RST_SEL2)
gpiobase+0x0068: 0x00000000 (GP_RST_SEL3)
gpiobase+0x006c: 0x00000000 (RESERVED)
gpiobase+0x0070: 0x00000000 (RESERVED)
gpiobase+0x0074: 0x00000000 (RESERVED)
gpiobase+0x0078: 0x00000000 (RESERVED)
gpiobase+0x007c: 0x00000000 (RESERVED)
Change-Id: Ic77474c4bc0871e95103ddecd9f6a9406c8f016d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: http://review.coreboot.org/3000
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'util/inteltool')
-rw-r--r-- | util/inteltool/gpio.c | 112 | ||||
-rw-r--r-- | util/inteltool/inteltool.c | 16 | ||||
-rw-r--r-- | util/inteltool/inteltool.h | 2 |
3 files changed, 103 insertions, 27 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 8b85593942..e42b9da445 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -20,6 +20,8 @@ #include <stdio.h> #include "inteltool.h" +typedef struct { uint16_t addr; uint32_t def; } gpio_default_t; + static const io_register_t ich0_gpio_registers[] = { { 0x00, 4, "GPIO_USE_SEL" }, { 0x04, 4, "GP_IO_SEL" }, @@ -256,14 +258,79 @@ static const io_register_t pch_gpio_registers[] = { { 0x78, 4, "RESERVED" }, { 0x7c, 4, "RESERVED" }, }; +static uint16_t gpiobase; + +static void print_reg(const io_register_t *const reg) +{ + switch (reg->size) { + case 4: + printf("gpiobase+0x%04x: 0x%08x (%s)\n", + reg->addr, inl(gpiobase+reg->addr), reg->name); + break; + case 2: + printf("gpiobase+0x%04x: 0x%04x (%s)\n", + reg->addr, inw(gpiobase+reg->addr), reg->name); + break; + case 1: + printf("gpiobase+0x%04x: 0x%02x (%s)\n", + reg->addr, inb(gpiobase+reg->addr), reg->name); + break; + } +} -int print_gpios(struct pci_dev *sb) +static uint32_t get_diff(const io_register_t *const reg, const uint32_t def) { - int i, size; - uint16_t gpiobase; + uint32_t gpio_diff = 0; + switch (reg->size) { + case 4: + gpio_diff = def ^ inl(gpiobase+reg->addr); + break; + case 2: + gpio_diff = (uint16_t)def ^ inw(gpiobase+reg->addr); + break; + case 1: + gpio_diff = (uint8_t)def ^ inb(gpiobase+reg->addr); + break; + } + return gpio_diff; +} + +static void print_diff(const io_register_t *const reg, + const uint32_t def, const uint32_t diff) +{ + switch (reg->size) { + case 4: + printf("gpiobase+0x%04x: 0x%08x (%s) DEFAULT\n", + reg->addr, def, reg->name); + printf("gpiobase+0x%04x: 0x%08x (%s) DIFF\n", + reg->addr, diff, reg->name); + break; + case 2: + printf("gpiobase+0x%04x: 0x%04x (%s) DEFAULT\n", + reg->addr, def, reg->name); + printf("gpiobase+0x%04x: 0x%04x (%s) DIFF\n", + reg->addr, diff, reg->name); + break; + case 1: + printf("gpiobase+0x%04x: 0x%02x (%s) DEFAULT\n", + reg->addr, def, reg->name); + printf("gpiobase+0x%04x: 0x%02x (%s) DIFF\n", + reg->addr, diff, reg->name); + break; + } +} + +int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) +{ + int i, j, size, defaults_size = 0; const io_register_t *gpio_registers; + const gpio_default_t *gpio_defaults; + uint32_t gpio_diff; - printf("\n============= GPIOS =============\n\n"); + if (show_diffs && !show_all) + printf("\n========== GPIO DIFFS ===========\n\n"); + else + printf("\n============= GPIOS =============\n\n"); switch (sb->device_id) { case PCI_DEVICE_ID_INTEL_Z68: @@ -376,26 +443,25 @@ int print_gpios(struct pci_dev *sb) printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase); + j = 0; for (i = 0; i < size; i++) { - switch (gpio_registers[i].size) { - case 4: - printf("gpiobase+0x%04x: 0x%08x (%s)\n", - gpio_registers[i].addr, - inl(gpiobase+gpio_registers[i].addr), - gpio_registers[i].name); - break; - case 2: - printf("gpiobase+0x%04x: 0x%04x (%s)\n", - gpio_registers[i].addr, - inw(gpiobase+gpio_registers[i].addr), - gpio_registers[i].name); - break; - case 1: - printf("gpiobase+0x%04x: 0x%02x (%s)\n", - gpio_registers[i].addr, - inb(gpiobase+gpio_registers[i].addr), - gpio_registers[i].name); - break; + if (show_all) + print_reg(&gpio_registers[i]); + + if (show_diffs && + (j < defaults_size) && + (gpio_defaults[j].addr == gpio_registers[i].addr)) { + gpio_diff = get_diff(&gpio_registers[i], + gpio_defaults[j].def); + if (gpio_diff) { + if (!show_all) + print_reg(&gpio_registers[i]); + print_diff(&gpio_registers[i], + gpio_defaults[j].def, gpio_diff); + if (!show_all) + printf("\n"); + } + j++; } } diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index d56d0580fa..2396eb04a2 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -197,11 +197,12 @@ void print_version(void) void print_usage(const char *name) { - printf("usage: %s [-vh?grpmedPMa]\n", name); + printf("usage: %s [-vh?gGrpmedPMa]\n", name); printf("\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" " -g | --gpio: dump soutbridge GPIO registers\n" + " -G | --gpio-diffs: show GPIO differences from defaults\n" " -r | --rcba: dump soutbridge RCBA registers\n" " -p | --pmbase: dump soutbridge Power Management registers\n\n" " -m | --mchbar: dump northbridge Memory Controller registers\n" @@ -227,11 +228,13 @@ int main(int argc, char *argv[]) int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0; int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0; int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0; + int show_gpio_diffs = 0; static struct option long_options[] = { {"version", 0, 0, 'v'}, {"help", 0, 0, 'h'}, {"gpios", 0, 0, 'g'}, + {"gpio-diffs", 0, 0, 'G'}, {"mchbar", 0, 0, 'm'}, {"rcba", 0, 0, 'r'}, {"pmbase", 0, 0, 'p'}, @@ -244,7 +247,7 @@ int main(int argc, char *argv[]) {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "vh?grpmedPMaA", + while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaA", long_options, &option_index)) != EOF) { switch (opt) { case 'v': @@ -254,6 +257,9 @@ int main(int argc, char *argv[]) case 'g': dump_gpios = 1; break; + case 'G': + show_gpio_diffs = 1; + break; case 'm': dump_mchbar = 1; break; @@ -277,6 +283,7 @@ int main(int argc, char *argv[]) break; case 'a': dump_gpios = 1; + show_gpio_diffs = 1; dump_mchbar = 1; dump_rcba = 1; dump_pmbase = 1; @@ -393,7 +400,10 @@ int main(int argc, char *argv[]) /* Now do the deed */ if (dump_gpios) { - print_gpios(sb); + print_gpios(sb, 1, show_gpio_diffs); + printf("\n\n"); + } else if (show_gpio_diffs) { + print_gpios(sb, 0, show_gpio_diffs); printf("\n\n"); } diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index ac23fe143a..5a6dcc8f0d 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -164,7 +164,7 @@ int print_intel_core_msrs(void); int print_mchbar(struct pci_dev *nb, struct pci_access *pacc); int print_pmbase(struct pci_dev *sb, struct pci_access *pacc); int print_rcba(struct pci_dev *sb); -int print_gpios(struct pci_dev *sb); +int print_gpios(struct pci_dev *sb, int show_all, int show_diffs); int print_epbar(struct pci_dev *nb); int print_dmibar(struct pci_dev *nb); int print_pciexbar(struct pci_dev *nb); |