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authorMichael Niewöhner <foss@mniewoehner.de>2020-03-13 18:48:16 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 13:05:31 +0000
commit099975debd89e72a1f2ea3a62dc1b9685b95533f (patch)
treead2d9f71eb5610b9fa839477c93890b641e4668b /util/inteltool
parentee1739cd004e656a8f8a890e6ee9094f770770ec (diff)
downloadcoreboot-099975debd89e72a1f2ea3a62dc1b9685b95533f.tar.xz
util/inteltool: powermgt: rename variable for consistency
Rename size variable for consistency with the other subsystems. Change-Id: I9407193ac9e34685362619cfd45384156e2385c3 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39507 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/inteltool')
-rw-r--r--util/inteltool/powermgt.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 2dfc05d64f..54a3045b84 100644
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -669,7 +669,7 @@ static const io_register_t i63xx_pm_registers[] = {
int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
{
- size_t i, size = 0;
+ size_t i, pm_registers_size = 0;
uint16_t pmbase;
const io_register_t *pm_registers;
uint64_t pwrmbase_phys = 0;
@@ -757,13 +757,13 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM:
pmbase = pci_read_word(sb, 0x40) & 0xff80;
pm_registers = pch_pm_registers;
- size = ARRAY_SIZE(pch_pm_registers);
+ pm_registers_size = ARRAY_SIZE(pch_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH10:
case PCI_DEVICE_ID_INTEL_ICH10R:
pmbase = pci_read_word(sb, 0x40) & 0xff80;
pm_registers = ich10_pm_registers;
- size = ARRAY_SIZE(ich10_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich10_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH7:
case PCI_DEVICE_ID_INTEL_ICH7M:
@@ -772,7 +772,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
case PCI_DEVICE_ID_INTEL_NM10:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich7_pm_registers;
- size = ARRAY_SIZE(ich7_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich7_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH9DH:
case PCI_DEVICE_ID_INTEL_ICH9DO:
@@ -782,39 +782,39 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
case PCI_DEVICE_ID_INTEL_ICH9ME:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich9_pm_registers;
- size = ARRAY_SIZE(ich9_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich9_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M:
case PCI_DEVICE_ID_INTEL_ICH8ME:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich8_pm_registers;
- size = ARRAY_SIZE(ich8_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich8_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH6:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich6_pm_registers;
- size = ARRAY_SIZE(ich6_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich6_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH5:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich5_pm_registers;
- size = ARRAY_SIZE(ich5_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich5_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH4:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich4_pm_registers;
- size = ARRAY_SIZE(ich4_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich4_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH2:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich2_pm_registers;
- size = ARRAY_SIZE(ich2_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich2_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_ICH0:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = ich0_pm_registers;
- size = ARRAY_SIZE(ich0_pm_registers);
+ pm_registers_size = ARRAY_SIZE(ich0_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_82371XX:
acpi = pci_get_dev(pacc, sb->domain, sb->bus, sb->dev, 3);
@@ -826,13 +826,13 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
pci_free_dev(acpi);
pm_registers = i82371xx_pm_registers;
- size = ARRAY_SIZE(i82371xx_pm_registers);
+ pm_registers_size = ARRAY_SIZE(i82371xx_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_I63XX:
pmbase = pci_read_word(sb, 0x40) & 0xfffc;
pm_registers = i63xx_pm_registers;
- size = ARRAY_SIZE(i63xx_pm_registers);
+ pm_registers_size = ARRAY_SIZE(i63xx_pm_registers);
break;
case PCI_DEVICE_ID_INTEL_CM236:
@@ -847,7 +847,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
pci_free_dev(acpi);
pm_registers = sunrise_pm_registers;
- size = ARRAY_SIZE(sunrise_pm_registers);
+ pm_registers_size = ARRAY_SIZE(sunrise_pm_registers);
break;
default:
printf("Error: Dumping PMBASE on this southbridge is not (yet) supported.\n");
@@ -856,7 +856,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
printf("PMBASE = 0x%04x (IO)\n\n", pmbase);
- for (i = 0; i < size; i++) {
+ for (i = 0; i < pm_registers_size; i++) {
switch (pm_registers[i].size) {
case 8:
printf("pmbase+0x%04x: 0x%08x (%s)\n"