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authorMaximilian Schander <coreboot@mimoja.de>2017-11-05 06:46:44 +0100
committerNico Huber <nico.h@gmx.de>2017-11-08 11:42:45 +0000
commitae848f871947825dbdc889bf4b0bb4c0fd92219f (patch)
tree51f46405621b2e77b4232e7b2171f4c817eadf4d /util/inteltool
parent798564333d541ab29abe210f818a500a7582baf7 (diff)
downloadcoreboot-ae848f871947825dbdc889bf4b0bb4c0fd92219f.tar.xz
util/inteltool: Add Skylake definition to MCHBAR reading
Taken from * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2 * Page 56 * 332688-003EN Change-Id: I46c8dd77823870b55cc040f7f6c557cb5a2562a1 Signed-off-by: Maximilian Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/22351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util/inteltool')
-rw-r--r--util/inteltool/memory.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 59329c8b22..87cd5d8f06 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -219,6 +219,7 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s
case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
+ case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
mchbar_phys = pci_read_long(nb, 0x48);
mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
mchbar_phys &= 0x0000007fffff8000UL; /* 38:15 */