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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-04 12:50:51 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-09 17:21:40 +0200 |
| commit | 614ef408157239db97b08420b93ba051f9428a47 (patch) | |
| tree | 18747fd2be83fbc16b5f5dbf2290b1e395158076 /util/intelvbttool | |
| parent | f92a98c56e063b34b83a35ac655ea8127d4b546f (diff) | |
| download | coreboot-614ef408157239db97b08420b93ba051f9428a47.tar.xz | |
soc/intel/quark: Identify the console UART
Pass the UART identifier to CorebootPayloadPkg
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: I9db1c31c3544d56b66f5a79ac8c3acee41788983
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14610
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/intelvbttool')
0 files changed, 0 insertions, 0 deletions