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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-01-31 15:45:13 +0100 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2017-02-02 07:06:20 +0100 |
| commit | 092db95742fe6e94b391d32d151868f70c5cab84 (patch) | |
| tree | 9c5e489af6685aee9f5d2194aa16e3caa0f30361 /util/lint/lint-stable-004-style-labels | |
| parent | fc18507134bfe2cb9add3f1196832318cd8adcdc (diff) | |
| download | coreboot-092db95742fe6e94b391d32d151868f70c5cab84.tar.xz | |
siemens/mc_apl1: Add new mainboard
This mainboard is based on Intel's Leafhill CRB with Apollo Lake
silicon. In a first step, it concerns only a copy of intel/leafhill
directory with minimum changes. Special adaptations for MC APL1
mainboard will follow in separate commits.
Change-Id: If0b8a2bc21c99c3be4e6043e8febfb1b91ff0a63
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/18272
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Brenton Dong <brenton.m.dong@intel.com>
Diffstat (limited to 'util/lint/lint-stable-004-style-labels')
0 files changed, 0 insertions, 0 deletions