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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-05-02 16:39:56 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-03 20:34:44 +0200 |
| commit | 8a36634388c33b2d688ecd13fbe39a01e5de3135 (patch) | |
| tree | a679d1c247ceaa26ecfa0814fe6a7ef90e888a03 /util/lint | |
| parent | d4bacf962c9e6185e7259eb4f7830bffca197e71 (diff) | |
| download | coreboot-8a36634388c33b2d688ecd13fbe39a01e5de3135.tar.xz | |
Don't pre-enable SATA AHCI in romstage.c
In a recent commit the SATA code of Panther Point / Cougar Point was
changed to enable AHCI mode depending on the device tree settings rather
than a hard code hidden in romstage.c. However, Emerald Lake 2 was not
fixed up accordingly.
Change-Id: I6c93f386509361e1ab5565b0e4d0e84f0ba282a2
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/995
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'util/lint')
0 files changed, 0 insertions, 0 deletions