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| author | Aaron Durbin <adurbin@chromium.org> | 2020-05-15 15:09:10 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-05-28 19:37:18 +0000 |
| commit | a85febcb1cfd31bd4d27e955fc2bcf9f8ef16cd5 (patch) | |
| tree | d6e2d2dfb841b696b8df807c3ecf78b6698724d7 /util/me_cleaner | |
| parent | 84f394e9c0cd9a82948f0027a76c8b41b14a11bc (diff) | |
| download | coreboot-a85febcb1cfd31bd4d27e955fc2bcf9f8ef16cd5.tar.xz | |
drivers/intel/fsp2_0: add option to compress FSP-S in cbfs
Allow the ability for chipset or mainboard to choose to
compress FSP-S in cbfs using LZMA or LZ4 routines. To accomplish
this fsp_load_component() is added as an assist for performing
the necessary logic and allow the caller to provide the destination
selection. Since the main cbfs decompression paths are utilized add
the appropriate checks for including compression algorithms under
the FSP-S compression options.
On picasso FSP-S (debug builds) the following savings were measured:
no-compression:
fsps.bin 327680 none
FSP_COMPRESS_FSP_S_LZ4:
fsps.bin 98339 LZ4 (327680 decompressed) -70%
FSP_COMPRESS_FSP_S_LZMA:
fsps.bin 71275 LZMA (327680 decompressed) -78%
BUG=b:155322763,b:150746858,b:152909132
Change-Id: I8aa5d8c1cbaf4d08f38a918a9031a2570bc5247e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/me_cleaner')
0 files changed, 0 insertions, 0 deletions