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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-06-29 13:06:46 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-01 05:22:10 +0000 |
| commit | abd3cae588856afa4bebac2d100ca22f61a17175 (patch) | |
| tree | 9eb71bd7764520049ddf9c70186c7347f066e4a3 /util/msrtool | |
| parent | b389f3aa0bf4831c988e2d3774d7df1699dc6a1d (diff) | |
| download | coreboot-abd3cae588856afa4bebac2d100ca22f61a17175.tar.xz | |
soc/intel/common/cpu: Don't set any TCC settings if offset is 0
Many previous versions of this function would return early if tcc_offset
is 0. This adds that logic back in.
Change-Id: Ibc529520a4e74608cb5d20e5a6e8fc2c727c903c
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'util/msrtool')
0 files changed, 0 insertions, 0 deletions