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| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2020-04-17 19:32:33 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-04-20 06:37:32 +0000 |
| commit | a48e7111209f7257cf40b317dc4df42e7c13ae24 (patch) | |
| tree | 3f53658ce95ea9a88bb10fad35e9a1d1d7a99d29 /util/nvramtool/cmos_ops.c | |
| parent | 9a3486e018f7ae54563d8be2c11297542e786597 (diff) | |
| download | coreboot-a48e7111209f7257cf40b317dc4df42e7c13ae24.tar.xz | |
mb/google/deltaur: Correct H1 I2C gpio pin setting
H1 uses I2C3 in the HW schematics and connects to GPP_H6 and GPP_H7.
Previous setting was wrong so correct it.
BUG=b:150165131
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I43c18baea66b927d51689579a40a53f72b94ef36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40487
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/nvramtool/cmos_ops.c')
0 files changed, 0 insertions, 0 deletions