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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-08 16:26:09 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 15:28:12 +0000 |
| commit | 0645347d0bb71fd5ebe44388dd69a8393fd091ec (patch) | |
| tree | 4b74892e21ae2202792e3dc1d3f20ea8fb300ddd /util/riscv/description.md | |
| parent | f56b7842274741503b10b197317eeb28720704be (diff) | |
| download | coreboot-0645347d0bb71fd5ebe44388dd69a8393fd091ec.tar.xz | |
soc/amd/picasso,stoneyridge: drop unused BIOSRAM offset defines
The two Socs don't use this functionality and biosram.c in the common
code is the only place where those defines are used, but it doesn't
include soc/iomap.h and has its own definitions instead.
Change-Id: I973df4ab39a94e89ea2ed6ffb639c5a85b8df456
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48470
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'util/riscv/description.md')
0 files changed, 0 insertions, 0 deletions