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author | Philipp Hug <philipp@hug.cx> | 2018-09-10 17:35:45 +0200 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2018-09-13 15:33:57 +0000 |
commit | bdd866e38a391d557f3a052cac0bb6387d9c4c24 (patch) | |
tree | 36f3e98ff32a51f009e66c1542120a701d826f45 /util/riscv | |
parent | 18764a328da0cf39ad83a658f9b84b99f220a30c (diff) | |
download | coreboot-bdd866e38a391d557f3a052cac0bb6387d9c4c24.tar.xz |
soc/sifive/fu540: Get SDRAM controller out of reset
Change-Id: Ifa6faffbaf353379f57e0f80c1c4ca2fc380f874
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/28583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions