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| author | Pavel Sayekat <pavelsayekat@gmail.com> | 2019-07-28 23:09:08 +0600 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-07-29 18:06:13 +0000 |
| commit | 9429b70f911f0ebab92a236234974bf0c8e6b565 (patch) | |
| tree | 875cb88dfc7c52fa4704067b3b5dcc067707fa0e /util/riscv | |
| parent | 90cf4bb02aac15a41873ef9435d826b143a0a04e (diff) | |
| download | coreboot-9429b70f911f0ebab92a236234974bf0c8e6b565.tar.xz | |
util/inteltool: Add H110 GPIO support
Change-Id: I0ce22da3d201c2443bb5a7fcfd779c2c6ee71577
Signed-off-by: Pavel Sayekat <pavelsayekat@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34602
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions