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authorEric Biederman <ebiederm@xmission.com>2004-05-28 14:11:54 +0000
committerEric Biederman <ebiederm@xmission.com>2004-05-28 14:11:54 +0000
commit90089603393a1a67b9a4afe1f2b7237a74e1b21b (patch)
tree30a036a2a3e52bf00a57257b043872906ee5eb68 /util/romcc/tests/hello_world1.c
parent7664d1cb87876a3b7e622cf1c7e40f1fb7988c9f (diff)
downloadcoreboot-90089603393a1a67b9a4afe1f2b7237a74e1b21b.tar.xz
- Upgrade to romcc version 0.63
This includes more test cases Lots of small bug fixes A built in C preprocessor Initial support for not inlining everything __attribute__((noinline)) works Better command line options and help Constants arrays can be read at compile time Asm statements that are not volatile will now be removed when their outputs go unused Loads and stores that are not volatile will be removed when their values go unused The number of FIXMES in the code is finally starting to go down. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/tests/hello_world1.c')
-rw-r--r--util/romcc/tests/hello_world1.c128
1 files changed, 128 insertions, 0 deletions
diff --git a/util/romcc/tests/hello_world1.c b/util/romcc/tests/hello_world1.c
new file mode 100644
index 0000000000..6dd80d89b8
--- /dev/null
+++ b/util/romcc/tests/hello_world1.c
@@ -0,0 +1,128 @@
+void outb(unsigned char value, unsigned short port)
+{
+ __builtin_outb(value, port);
+}
+
+unsigned char inb(unsigned short port)
+{
+ return __builtin_inb(port);
+}
+
+/* Base Address */
+#ifndef TTYS0_BASE
+#define TTYS0_BASE 0x3f8
+#endif
+
+#ifndef TTYS0_BAUD
+#define TTYS0_BAUD 115200
+#endif
+
+#if ((115200%TTYS0_BAUD) != 0)
+#error Bad ttys0 baud rate
+#endif
+
+#if TTYS0_BAUD == 115200
+#define TTYS0_DIV (1)
+#else
+#define TTYS0_DIV (115200/TTYS0_BAUD)
+#endif
+
+/* Line Control Settings */
+#ifndef TTYS0_LCS
+/* Set 8bit, 1 stop bit, no parity */
+#define TTYS0_LCS 0x3
+#endif
+
+#define UART_LCS TTYS0_LCS
+
+/* Data */
+#define UART_RBR 0x00
+#define UART_TBR 0x00
+
+/* Control */
+#define UART_IER 0x01
+#define UART_IIR 0x02
+#define UART_FCR 0x02
+#define UART_LCR 0x03
+#define UART_MCR 0x04
+#define UART_DLL 0x00
+#define UART_DLM 0x01
+
+/* Status */
+#define UART_LSR 0x05
+#define UART_MSR 0x06
+#define UART_SCR 0x07
+
+int uart_can_tx_byte(void)
+{
+ return inb(TTYS0_BASE + UART_LSR) & 0x20;
+}
+
+void uart_wait_to_tx_byte(void)
+{
+ while(!uart_can_tx_byte())
+ ;
+}
+
+void uart_wait_until_sent(void)
+{
+ while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
+ ;
+}
+
+static void uart_tx_byte(unsigned char data)
+{
+ uart_wait_to_tx_byte();
+ outb(data, TTYS0_BASE + UART_TBR);
+ /* Make certain the data clears the fifos */
+ uart_wait_until_sent();
+}
+
+
+void uart_init(void)
+{
+ /* disable interrupts */
+ outb(0x0, TTYS0_BASE + UART_IER);
+ /* enable fifo's */
+ outb(0x01, TTYS0_BASE + UART_FCR);
+ /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
+ outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
+ outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
+ outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
+ outb(UART_LCS, TTYS0_BASE + UART_LCR);
+}
+
+
+void __console_tx_char(unsigned char byte)
+{
+ uart_tx_byte(byte);
+
+}
+
+void __console_tx_string(char *str)
+{
+ unsigned char ch;
+ while((ch = *str++) != '\0') {
+ __console_tx_char(ch);
+ }
+}
+
+
+void print_debug_char(unsigned char byte) { __console_tx_char(byte); }
+void print_debug(char *str) { __console_tx_string(str); }
+
+void main(void)
+{
+ static const char msg[] = "hello world\r\n";
+ uart_init();
+#if 0
+ print_debug(msg);
+#endif
+#if 1
+ print_debug("hello world\r\n");
+ print_debug("how are you today\r\n");
+#endif
+ while(1) {
+ ;
+ }
+}