util/romcc: Drop romcc support

Finally all boards use a GCC compiled bootblock!

Change-Id: I0c9a1b19dbdc32b43875da7d685718bae9d7f5f4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37337
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 0 insertions, 30 deletions

diff --git a/util/romcc/tests/simple_test10.c b/util/romcc/tests/simple_test10.c
deleted file mode 100644
index b2e0ba5219..0000000000
--- a/util/romcc/tests/simple_test10.c
+++ /dev/null
@@ -1,30 +0,0 @@
-#define SMBUS_MEM_DEVICE_START 0x50
-#define SMBUS_MEM_DEVICE_END 0x53
-#define SMBUS_MEM_DEVICE_INC 1
-
-static void spd_set_drb(void)
-{
-	/*
-	 * Effects:	Uses serial presence detect to set the
-	 *              DRB registers which holds the ending memory address assigned
-	 *              to each DIMM.
-	 */
-	unsigned end_of_memory;
-	unsigned char device;
-
-	end_of_memory = 0; /* in multiples of 8MiB */
-	device = SMBUS_MEM_DEVICE_START;
-	while (device <= SMBUS_MEM_DEVICE_END) {
-		unsigned side1_bits, side2_bits;
-		int byte, byte2;
-
-		side1_bits = side2_bits = -1;
-
-		/* Compute the end address for the DRB register */
-		/* Only process dimms < 2GB (2^8 * 8MB) */
-		if (side1_bits < 8) {
-			end_of_memory += (1 << side1_bits);
-		}
-		device += SMBUS_MEM_DEVICE_INC;
-	}
-}