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author | Eric Biederman <ebiederm@xmission.com> | 2003-06-19 15:14:52 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-06-19 15:14:52 +0000 |
commit | f7a0ba84dcddf08cdd6a4431c899ae1ee0ed986c (patch) | |
tree | 534aa45bab630b970d02f2f7f514dc3acc9d9683 /util/romcc/tests/simple_test35.c | |
parent | 9dbd46077615b14f28f6a6b398c392f608af68e1 (diff) | |
download | coreboot-f7a0ba84dcddf08cdd6a4431c899ae1ee0ed986c.tar.xz |
- Update the romcc version.
- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered
With this update there are no known silent failures in romcc.
- Update the memory initialization code to setup all 3 of the memory sizing registers properly
- In auto.c test our dynamic maximum amount of ram.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/romcc/tests/simple_test35.c')
-rw-r--r-- | util/romcc/tests/simple_test35.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/util/romcc/tests/simple_test35.c b/util/romcc/tests/simple_test35.c new file mode 100644 index 0000000000..d60b157f25 --- /dev/null +++ b/util/romcc/tests/simple_test35.c @@ -0,0 +1,9 @@ +static void main(void) +{ + __builtin_msr_t msr; + msr = __builtin_rdmsr(0xC001001A); + while(__builtin_inb(0x3fd)) + ; + __builtin_outb(msr.hi, 0x3f8); + +} |