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authorArthur Heymans <arthur@aheymans.xyz>2019-11-28 16:14:56 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-27 09:00:16 +0000
commit945b698f82279fdb42f83f6a3eb2e6f74db2869c (patch)
tree3eac3bd7ec5032441081d89a370acddf8f3e5f5b /util/romcc/tests/simple_test45.c
parentc2092569d5d21e0cdd3690d8021c2d46dfeaeabd (diff)
downloadcoreboot-945b698f82279fdb42f83f6a3eb2e6f74db2869c.tar.xz
util/romcc: Drop romcc support
Finally all boards use a GCC compiled bootblock! Change-Id: I0c9a1b19dbdc32b43875da7d685718bae9d7f5f4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37337 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/romcc/tests/simple_test45.c')
-rw-r--r--util/romcc/tests/simple_test45.c41
1 files changed, 0 insertions, 41 deletions
diff --git a/util/romcc/tests/simple_test45.c b/util/romcc/tests/simple_test45.c
deleted file mode 100644
index 5e8d742fa8..0000000000
--- a/util/romcc/tests/simple_test45.c
+++ /dev/null
@@ -1,41 +0,0 @@
-static void spd_set_memclk(void)
-{
- unsigned min_cycle_time;
- unsigned device;
- int new_cycle_time, new_latency;
- int index;
- int latency;
-
- min_cycle_time = 0x50;
- device = 0x50;
- new_cycle_time = 0xa0;
- new_latency = 5;
-
-
- latency = 0;
- for(index = 0; index < 3; index++, latency++) {
- unsigned long loops;
- loops = 1000000;
- do {
- unsigned short val;
- val = __builtin_inw(0x10e0);
- } while(--loops);
- if (!loops) {
- continue;
- }
-
- __builtin_outb(device, 0xe4);
- __builtin_outb(index, 0xe8);
-
- loops = 1000000;
- while(--loops)
- ;
- }
- if (new_latency > 4){
- return;
- }
-
- if (new_cycle_time > min_cycle_time) {
- min_cycle_time = new_cycle_time;
- }
-}