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author | Patrick Georgi <patrick@georgi-clan.de> | 2013-02-06 11:37:08 +0100 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-02-06 15:05:38 +0100 |
commit | 315dec48ea6ae4f06dc3a0751dfa2ddf9ff55fba (patch) | |
tree | 5cf25803d845586f8bd4ad3395ca54a55f2316ff /util/romcc | |
parent | c5ff6487e65294aac4dccbf6b2a56ac518f982e2 (diff) | |
download | coreboot-315dec48ea6ae4f06dc3a0751dfa2ddf9ff55fba.tar.xz |
bootblock: Reduce register load
The common part of the bootblock resets the nvram data if it's found
to be invalid. Since that code is compiled with romcc in i386 mode,
there's a shortage on registers.
Try to reduce the strain by doing things smarter: cmos_write_inner
is the same as cmos_write, just that it doesn't check if the RTC is
disabled. Since we just disabled it before, we can assume that it is so.
Change-Id: Ic85eb2a5df949d1c1aff654bc1b40d6f2ff71756
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2296
Tested-by: build bot (Jenkins)
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Diffstat (limited to 'util/romcc')
0 files changed, 0 insertions, 0 deletions