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author | Sven Schnelle <svens@stackframe.org> | 2012-06-21 22:19:48 +0200 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-13 08:38:13 +0200 |
commit | 0fa50a1990fcdfca6a9f75a68f8e4ed22ddd6949 (patch) | |
tree | ff1ee24731267f351b79d321eb54fd773b51e299 /util/sconfig/sconfig.y | |
parent | 6591470ae0c9639b1ef591ede96eee4a930f35e2 (diff) | |
download | coreboot-0fa50a1990fcdfca6a9f75a68f8e4ed22ddd6949.tar.xz |
MPTAPLE: generate from devicetree.cb
This patch adds support for autogenerating the MPTABLE from
devicetree.cb. This is done by a write_smp_table() declared
weak in mpspec.c. If the mainboard doesn't provide it's own
function, this generic implementation is called.
Syntax in devicetree.cb:
ioapic_irq <APICID> <INTA|INTB|INTC|INTD> <INTPIN>
The ioapic_irq directive can be used in pci and pci_domain
devices. If there's no directive, the autogen code traverses
the tree back to the pci_domain and stops at the first device
which such a directive, and use that information to generate the
entry according to PCI IRQ routing rules.
Change-Id: I4df5b198e8430f939d477c14c798414e398a2027
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/1138
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'util/sconfig/sconfig.y')
-rwxr-xr-x | util/sconfig/sconfig.y | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/util/sconfig/sconfig.y b/util/sconfig/sconfig.y index f97850ff69..12573a7d2d 100755 --- a/util/sconfig/sconfig.y +++ b/util/sconfig/sconfig.y @@ -30,13 +30,13 @@ static struct device *cur_parent, *cur_bus; int number; } -%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT +%token CHIP DEVICE REGISTER BOOL BUS RESOURCE END EQUALS HEX STRING PCI PNP I2C APIC APIC_CLUSTER PCI_DOMAIN IRQ DRQ IO NUMBER SUBSYSTEMID INHERIT IOAPIC_IRQ IOAPIC PCIINT %% devtree: { cur_parent = cur_bus = head; } chip { postprocess_devtree(); } ; chipchildren: chipchildren device | chipchildren chip | chipchildren registers | /* empty */ ; -devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | /* empty */ ; +devicechildren: devicechildren device | devicechildren chip | devicechildren resource | devicechildren subsystemid | devicechildren ioapic_irq | /* empty */ ; chip: CHIP STRING /* == path */ { $<device>$ = new_chip(cur_parent, cur_bus, $<string>2); @@ -72,5 +72,6 @@ subsystemid: SUBSYSTEMID NUMBER NUMBER subsystemid: SUBSYSTEMID NUMBER NUMBER INHERIT { add_pci_subsystem_ids(cur_parent, strtol($<string>2, NULL, 16), strtol($<string>3, NULL, 16), 1); }; - +ioapic_irq: IOAPIC_IRQ NUMBER PCIINT NUMBER + { add_ioapic_info(cur_parent, strtol($<string>2, NULL, 16), $<string>3, strtol($<string>4, NULL, 16)); }; %% |