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authorRaul E Rangel <rrangel@chromium.org>2020-04-27 15:38:58 -0600
committerAaron Durbin <adurbin@chromium.org>2020-05-01 15:42:01 +0000
commit3e42ee05d86c1de3ed23dddf08fd8e6451bdea92 (patch)
tree2b6941b396b30cbbb20ab2865cf738b6576a1320 /util/scripts/dts-to-fmd.sh
parente4c81bcca59e94c71f7acf48c060da827afeb15a (diff)
downloadcoreboot-3e42ee05d86c1de3ed23dddf08fd8e6451bdea92.tar.xz
cpu/x86/mtrr/earlymtrr: Validate MTRR arguments
The AMD64 Architecture Programmer's Manual, Volume 2: Systems Programming says the following about variable MTRRs: Variable Range Size and Alignment. The size and alignment of variable memory-ranges (MTRRs) and I/O ranges (IORRs) are restricted as follows: * The boundary on which a variable range is aligned must be equal to the range size. For example, a memory range of 16 Mbytes must be aligned on a 16-Mbyte boundary (i.e., naturally aligned). * The range size must be a power of 2 (2^n , 52 > n > 11), with a minimum allowable size of 4 Kbytes. For example, 4 Mbytes and 8 Mbytes are allowable memory range sizes, but 6 Mbytes is not allowable. Print out errors if these conditions are violated. I didn't assert since `set_var_mtrr` can be used in boot block before the serial console is enabled. BUG=b:147042464 TEST=Boot trembyle and see MTRR errors: MTRR Error: base 0xcc800000 must be aligned to size 0x1000000 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I8b8c734c7599bd89cf9f212ed43c2dd5b2c8ba7b Reviewed-on: https://review.coreboot.org/c/coreboot/+/40762 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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