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authorNick Vaccaro <nvaccaro@google.com>2020-10-02 12:59:43 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-10-12 08:38:27 +0000
commit6745056a06fa2e69cc23bc797a7a69bb6c0e2b58 (patch)
treea5d4cf67bf0dd156ca792dfb5c23a52943b22fd7 /util/spd_tools/ddr4
parent1f8af4f49b9556eb5540948f664549c07af58ef4 (diff)
downloadcoreboot-6745056a06fa2e69cc23bc797a7a69bb6c0e2b58.tar.xz
util: Add DDR4 generic SPD for H5ANAG6NCJR-XNC
Add SPD support for DDR4 memory part H5ANAG6NCJR-XNC. BUG=b:161772961 TEST=none Change-Id: I71e4de9a28f78bbf8c7de1fcafa3596276a5f2f9 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/spd_tools/ddr4')
-rw-r--r--util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt12
1 files changed, 12 insertions, 0 deletions
diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
index 776bce7d2b..72b0ccd9aa 100644
--- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
+++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
@@ -191,6 +191,18 @@
"packageBusWidth": 16,
"ranksPerPackage": 1
}
+ },
+ {
+ // Datasheet Revision: Rev. 1.4, May. 2020
+ "name": "H5ANAG6NCJR-XNC",
+ "attribs": {
+ "speedMTps": 3200,
+ "CL_nRCD_nRP": 22,
+ "capacityPerDieGb": 16,
+ "diesPerPackage": 1,
+ "packageBusWidth": 16,
+ "ranksPerPackage": 1
+ }
}
]
}