summaryrefslogtreecommitdiff
path: root/util/spd_tools
diff options
context:
space:
mode:
authorRob Barnes <robbarnes@google.com>2020-08-26 09:56:37 -0600
committerFurquan Shaikh <furquan@google.com>2020-08-27 21:41:18 +0000
commita2e431331cbbad167efa1524e42a863a49e03a14 (patch)
tree63a6736036c16f4d3a75ed7fedda45e56ea54e56 /util/spd_tools
parent196e9c002122d3469ab486d2f40af1e66dcdf067 (diff)
downloadcoreboot-a2e431331cbbad167efa1524e42a863a49e03a14.tar.xz
util/spd_tools: Support comments in json
Allow comments in json file for better documentation. Comments must be on seperate line. BUG=none TEST=Injest global_ddr4_mem_parts.json.txt with comments Change-Id: I51295408d4f916708e4ed5bc42d5468ccdc68a6b Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/spd_tools')
-rw-r--r--util/spd_tools/ddr4/gen_spd.go5
-rw-r--r--util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt3
2 files changed, 8 insertions, 0 deletions
diff --git a/util/spd_tools/ddr4/gen_spd.go b/util/spd_tools/ddr4/gen_spd.go
index 5adadc962a..0462fd5056 100644
--- a/util/spd_tools/ddr4/gen_spd.go
+++ b/util/spd_tools/ddr4/gen_spd.go
@@ -12,6 +12,7 @@ import (
"reflect"
"strconv"
"strings"
+ "regexp"
)
/*
@@ -998,6 +999,10 @@ func readMemoryParts(memParts *memParts, memPartsFileName string) error {
return err
}
+ // Strip comments from json file
+ re := regexp.MustCompile(`(?m)^\s*//.*`)
+ databytes = re.ReplaceAll(databytes, []byte(""))
+
return json.Unmarshal(databytes, memParts)
}
diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
index 4e9c7c8e95..51068d5154 100644
--- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
+++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
@@ -1,3 +1,6 @@
+// Global list of ddr4 memory part attributes.
+// These attributes match the part specifications and are independent
+// of any SoC expectations.
{
"parts": [
{