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authorUwe Hermann <uwe@hermann-uwe.de>2007-09-20 00:00:49 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-09-20 00:00:49 +0000
commit2c290e3362337feffd2086994f5f720d9332d38e (patch)
tree2a19392309baf65912f52819d555df0a949881a2 /util/superiotool/winbond.c
parente47495659080e136a405483a6cb4413dbcb09925 (diff)
downloadcoreboot-2c290e3362337feffd2086994f5f720d9332d38e.tar.xz
Superiotool: Add dump support to the Winbond W83697HF/F.
Minor coding style changes and code simplifications. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/superiotool/winbond.c')
-rw-r--r--util/superiotool/winbond.c74
1 files changed, 57 insertions, 17 deletions
diff --git a/util/superiotool/winbond.c b/util/superiotool/winbond.c
index 0058c33ee9..709e7f329f 100644
--- a/util/superiotool/winbond.c
+++ b/util/superiotool/winbond.c
@@ -30,57 +30,97 @@
*/
const static struct superio_registers reg_table[] = {
{0x601, "W83697HF/F", {
- /*
- {NOLDN,
- {0x20,0x21,EOT},
- {0x60,NANA,EOT}},
- */
+ {NOLDN, NULL,
+ /* TODO: 0x02, 0x07. */
+ {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,
+ 0x2a,EOT},
+ {0x60,NANA,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
+ MISC,EOT}},
+ /* Some register defaults depend on the value of PNPCSV. */
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
+ 0xf5,EOT},
+ {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
+ 0x00,EOT}},
+ {0x1, "Parallel port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
+ {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
+ {0x2, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x01,0x03,0xf8,0x04,0x00,EOT}},
+ {0x3, "COM2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
+ {0x6, "CIR",
+ {0x30,0x60,0x61,0x70,EOT},
+ {0x00,0x00,0x00,0x00,EOT}},
+ {0x7, "Game port, GPIO port 1",
+ {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
+ {0x8, "MIDI port, GPIO port 5",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
+ 0xf4,0xf5,EOT},
+ {0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
+ 0x00,0x00,EOT}},
+ {0x9, "GPIO port 2, 3, and 4",
+ {0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
+ 0xf7,0xf8,0xf5,EOT},
+ {0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
+ 0x00,0x00,0x00,EOT}},
+ {0xa, "ACPI",
+ {0x30,0x70,0xe0,0xe1,0xe2,0xe5,0xe6,0xe7,
+ 0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,EOT},
+ {0x00,0x00,0x00,0x00,NANA,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0xb, "Hardware monitor",
+ {0x30,0x60,0x61,0x70,EOT},
+ {0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
{0x886, "W83627EHF/EF/EHG/EG", {
- {NOLDN,
+ {NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x88,NANA,0xff,0x00,MISC,0x00,MISC,RSVD,0x50,
0x04,0x00,RSVD,0x00,0x21,0x00,0x00,EOT}},
- {0x0,
+ {0x0, NULL,
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x8e,0x00,0xff,0x00,
0x00,EOT}},
- {0x1,
+ {0x1, NULL,
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
- {0x2,
+ {0x2, NULL,
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
- {0x3,
+ {0x3, NULL,
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
- {0x5,
+ {0x5, NULL,
{0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
{0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}},
- {0x6,
+ {0x6, NULL,
{0x30,0x62,0x63,EOT},
{0x00,0x00,0x00,EOT}},
- {0x7,
+ {0x7, NULL,
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0x02,0x01,0x03,0x30,0x09,0xff,0x00,0x00,0x00,
0xff,0x00,0x00,0x00,EOT}},
- {0x8,
+ {0x8, NULL,
{0x30,0xf5,0xf6,0xf7,EOT},
{0x00,0x00,0x00,0x00,EOT}},
- {0x9,
+ {0x9, NULL,
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xf0,0xf1,0xf2,
0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,
0x00,0xff,0x00,0x00,0x00,EOT}},
- {0xa,
+ {0xa, NULL,
{0x30,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
0xe8,0xf2,0xf3,0xf4,0xf6,0xf7,EOT},
{0x00,0x00,0x01,0x00,0xff,0x08,0x00,RSVD,0x00,0x00,
RSVD,0x7c,0x00,0x00,0x00,0x00,EOT}},
- {0xb,
+ {0xb, NULL,
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0xc1,0x00,EOT}},
{EOT}}},